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AD9661AKR-REEL Datasheet(PDF) 4 Page - Analog Devices |
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AD9661AKR-REEL Datasheet(HTML) 4 Page - Analog Devices |
4 / 12 page AD9661A REV. 0 –4– PIN DESCRIPTIONS Pin Function OUTPUT Analog laser diode current output. Connect to cathode of laser diode, anode connected to +VS externally. POWER LEVEL Analog voltage input, VREF to VREF + 1.6 V. Output current is set proportional to the POWER LEVEL during calibration as follows: IMONITOR = V POWER LEVEL – V REF R GAIN + 50 Ω CAL TTL/CMOS compatible, feedback loop T/H control signal. Logic LOW enables calibration mode, and the feedback loop T/H goes into track mode 13 ns after (the aperture delay) PULSE goes logic HIGH (there is no aperture delay if PULSE goes high before CAL transitions to a LOW level). Logic HIGH dis- ables the T/H and immediately places it in hold mode. PULSE should be held HIGH while calibrating. Floats logic HIGH. HOLD External hold capacitor for the bias loop T/H. Approximate droop in the output current while CAL is logic HIGH is: ±∆IOUT = 18 ×10 –9 t HOLD C HOLD Bandwidth of the loop is: BW ≈ 1 2 π (550 Ω)C HOLD PULSE TTL/CMOS compatible, current control signal. Logic HIGH supplies IOUT to the laser diode. Logic LOW turns IOUT off. Floats logic HIGH. PULSE 2 TTL/CMOS compatible, current control signal. Logic LOW supplies IOUT to the laser diode. Logic HIGH turns IOUT off. Floats logic HIGH. SENSE IN Analog current input, IMONITOR, from PIN photo detector diode. SENSE IN should be connected to the anode of the PIN diode, with the PIN cathode connected to +VS or another positive voltage. Voltage at SENSE IN varies slightly with temperature and current, but is typically 1.0 V. GAIN External connection for the feedback network of the transimpedance amplifier. External feedback network, RGAIN and CGAIN, should be connected between GAIN and POWER MONITOR. See text for choosing values. POWER MONITOR Output voltage monitor of the internal feedback loop. Voltage is proportional to feedback current from photo diode, IMONITOR. DISABLE TTL/CMOS compatible, current output disable circuit. Logic LOW for normal operation; logic HIGH disables the current outputs to the laser diode, and drives the voltage on the hold capacitors close to VREF (minimizes the output current when the device is re-enabled). DISABLE floats logic HIGH. VREF Analog Voltage output, internal bandgap voltage reference, ~1.8 V, provided to user for power level offset. +VS Power Supply, nominally +5 V. All +VS connections should be tied together externally. GROUND Ground reference. All GROUND connections should be tied together externally. LEVEL SHIFT IN Analog input to the on board level shift circuit. Input Range 0.1 V – 1.6 V. LEVEL SHIFT OUT Voltage output from on board level shift circuit. Connect to POWER LEVEL externally to use the on board level shift circuit. Output voltage is VLEVEL SHIFT OUT = VLEVEL SHIFT IN +VREF. PIN ASSIGNMENTS AD9661AKR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (Not to Scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PULSE2 DNC VREF LEVEL SHIFT IN GAIN SENSE INPUT GROUND +VS GROUND HOLD POWER LEVEL DISABLE +VS GROUND OUTPUT GROUND OUTPUT GROUND OUTPUT GROUND OUTPUT GROUND +VS GROUND CAL PULSE1 POWER MONITOR LEVEL SHIFT OUT |
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