AD9661A

REV. 0

–4–

PIN DESCRIPTIONS

Pin

Function

OUTPUT

POWER LEVEL

V

POWER LEVEL

– V

REF

R

CAL

TTL/CMOS compatible, feedback loop T/H control signal. Logic LOW enables calibration mode, and

the feedback loop T/H goes into track mode 13 ns after (the aperture delay) PULSE goes logic HIGH

(there is no aperture delay if PULSE goes high before CAL transitions to a LOW level). Logic HIGH dis-

ables the T/H and immediately places it in hold mode. PULSE should be held HIGH while calibrating.

Floats logic HIGH.

HOLD

External hold capacitor for the bias loop T/H. Approximate droop in the output current while CAL is

18

×10

–9

t

HOLD

C

HOLD

1

2

π (550 Ω)C

HOLD

PULSE

PULSE 2

SENSE IN

SENSE IN varies slightly with temperature and current, but is typically 1.0 V.

GAIN

External connection for the feedback network of the transimpedance amplifier. External feedback network,

values.

POWER MONITOR

Output voltage monitor of the internal feedback loop. Voltage is proportional to feedback current from

DISABLE

TTL/CMOS compatible, current output disable circuit. Logic LOW for normal operation; logic HIGH

(minimizes the output current when the device is re-enabled). DISABLE floats logic HIGH.

Analog Voltage output, internal bandgap voltage reference, ~1.8 V, provided to user for power level offset.

GROUND

Ground reference. All GROUND connections should be tied together externally.

LEVEL SHIFT IN

Analog input to the on board level shift circuit. Input Range 0.1 V – 1.6 V.

LEVEL SHIFT OUT

Voltage output from on board level shift circuit. Connect to POWER LEVEL externally to use the on

PIN ASSIGNMENTS

AD9661AKR

1

2

3

4

5

6

7

8

9

10

11

12

13

14

(Not to Scale)

28

27

26

25

24

23

22

21

20

19

18

17

16

15

PULSE2

DNC

LEVEL SHIFT IN

GAIN

SENSE INPUT

GROUND

GROUND

HOLD

POWER LEVEL

DISABLE

GROUND

OUTPUT

GROUND

OUTPUT

GROUND

OUTPUT

GROUND

OUTPUT

GROUND

GROUND

CAL

PULSE1

POWER MONITOR

LEVEL SHIFT OUT