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AT45DB081D-SU-2.5 Datasheet(PDF) 10 Page - Analog Devices

Part # AT45DB081D-SU-2.5
Description  8-megabit 2.5V or 2.7V DataFlash
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Direct Link  http://www.analog.com
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AT45DB081D-SU-2.5 Datasheet(HTML) 10 Page - Analog Devices

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3596O–DFLASH–1/2013
AT45DB081D
7.6
Sector Erase
The Sector Erase command can be used to individually erase any sector in the main memory.
There are 16 sectors and only one sector can be erased at one time. To perform sector 0a or
sector 0b erase for the DataFlash standard page size (264-bytes), an opcode of 7CH must be
loaded into the device, followed by three address bytes comprised of three don’t care bits, nine
page address bits (PA11 - PA3) and 12 don’t care bits. To perform a sector 1-15 erase, the
opcode 7CH must be loaded into the device, followed by three address bytes comprised of
three don’t care bits, four page address bits (PA11 - PA8) and 17 don’t care bits. To perform
sector 0a or sector 0b erase for the binary page size (256-bytes), an opcode of 7CH must be
loaded into the device, followed by three address bytes comprised of four don’t care bit and nine
page address bits (A19 - A11) and 11 don’t care bits. To perform a sector 1-15 erase, the
opcode 7CH must be loaded into the device, followed by three address bytes comprised of four
don’t care bit and four page address bits (A19 - A16) and 16 don’t care bits. The page address
bits are used to specify any valid address location within the sector which is to be erased. When
a low-to-high transition occurs on the CS pin, the part will erase the selected sector. The erase
operation is internally self-timed and should take place in a maximum time of tSE. During this
time, the status register will indicate that the part is busy.
7.7
Chip Erase
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH
must be clocked into the device. Since the entire memory array is to be erased, no address
bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. After the last bit of the opcode sequence has been clocked in, the CS pin can be deas-
serted to start the erase process. The erase operation is internally self-timed and should take
place in a time of tCE. During this time, the Status Register will indicate that the device is busy.
The Chip Erase command will not affect sectors that are protected or locked down; the contents
of those sectors will remain unchanged. Only those sectors that are not protected or locked
down will be erased.
Table 7-2.
Sector Erase Addressing
PA11/
A19
PA10/
A18
PA9/
A17
PA8/
A16
PA7/
A15
PA6/
A14
PA5/
A13
PA4/
A12
PA3/
A11
PA2/
A10
PA1/
A9
PA0/
A8
Sector
000000000
X
X
X
0a
000000001
X
X
X
0b
0001
XXXXXXXX
1
0010
XXXXXXXX
2
1100
XXXXXXXX
12
1101
XXXXXXXX
13
1110
XXXXXXXX
14
1111
XXXXXXXX
15


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