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ADP1147AN-5 Datasheet(PDF) 9 Page - Analog Devices |
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ADP1147AN-5 Datasheet(HTML) 9 Page - Analog Devices |
9 / 12 page ADP1147-3.3/ADP1147-5 –9– REV. 0 The Schottky diode is in conduction during the MOSFET off- time. A short circuit of VOUT = 0 is the most demanding situa- tion on for the diode. During this time it must be capable of delivering ISC(PK) for duty cycles approaching 100%. The equa- tion below is used to calculate the average current conducted by the diode under normal load conditions. ID1 = V IN –VOUT V IN +V D × I LOAD To guard against increased power dissipation due to undesired ringing, it is extremely important to adhere to the following: 1. Use proper grounding techniques. 2. Keep all track lengths as short as possible, especially connec- tions made to the diode (refer to PCB Layout Considerations section). The allowable forward voltage drop of the diode is determined by the maximum short circuit current and power dissipation. The equation below is used to calculate VF: VF = PD/ISC(PK) where PD is the maximum allowable power dissipation and is determined by the system efficiency and thermal requirements (refer to Efficiency Section). CIN Considerations During the continuous mode of operation the current drawn from the source is a square wave with a duty cycle equal to VOUT/VIN. To reduce or prevent large voltage transients an input capacitor with a low ESR value and capable of handling the maximum rms current should be selected. The formula below is used to determine the required maximum rms capacitor current: CIN IRMS = [VOUT (VIN–VOUT)] 0.5 × I MAX/VIN The maximum for this formula is reached when VIN = 2 VOUT, where IRMS = IOUT/2. It is best to use this worst case scenario for design margin. Manufacturers of capacitors typically base the current ratings of their caps on a 2000-hour life. This requires a prudent designer to use capacitors that are derated or rated at a higher temperature. The use of multiple capacitors in parallel may also be used to meet design requirements. The capacitor manufacturer should be consulted for questions regarding spe- cific capacitor selection. In addition, for high frequency decoupling a 0.1 µF to 1.0 µF ceramic capacitor should be placed and connected as close to the VIN pin as possible. COUT Considerations The minimum required ESR value is the primary consideration when selecting COUT. For proper circuit operation the ESR value of COUT must be less than two times the value selected for RSENSE (see equation below): COUT Minimum Required ESR < 2 RSENSE When selecting a capacitor for COUT, the minimum required ESR is the primary concern. Proper circuit operation mandates that the ESR value of COUT must be less than two times the value of RSENSE. A capacitor with an ESR value equal to RSENSE will provide the best overall efficiency. If the ESR value of COUT increases to two times RSENSE a 1% decrease in efficiency results. United Chemicon, Nichicon and Sprague are three manufacturers of high grade capacitors. Sprague offers a capacitor that uses an OS-CON semiconductor dielectric. This style capacitor pro- vides the lowest amount of ESR for its size, but at a higher cost. Most capacitors that meet the ESR requirements for IP-P ripple will usually meet or exceed the rms current requirements. The specifications for the selected capacitor should be consulted. Surface mount applications may require the use of multiple capacitors in parallel to meet the ESR or rms current require- ments. If dry tantalum capacitors are used it is critical that they be surge tested and recommended by the manufacturer for use in switching power supplies such as Type 593D from Sprague. AVX offers the TPS series of capacitors with various heights from 2 mm to 4 mm. The manufacturer should be consulted for the latest information, specifications and recommendations concerning specific capacitors. When operating with low supply voltages, a minimum output capacitance will be required to prevent the device from operating in a low frequency mode (see Figure 5). The output ripple also increases at low frequencies if COUT is too small. Transient Response The response of the regulator loop can be verified by monitoring the transient load response. Several cycles may be required for a switching regulator circuit to respond to a step change in the dc load current (resistive load). When a step in the load current takes place a change in VOUT occurs. The amount of the change in VOUT is equal to the delta of ILOAD × ESR of COUT. The delta of ILOAD charges or discharges the output voltage on capacitor COUT. This continues until the regulator loop responds to the change in load and is able to restore VOUT to its original value. VOUT should be monitored during the step change in load for overshoot, undershoot or ringing, which may indicate a stability problem. The circuit shown in Figure 1 contains external com- ponents that should provide sufficient compensation for most applications. The most demanding form of a transient that can be placed on a switching regulator is the hot switching in of loads that contain bypass or other sources of capacitance greater than 1 µF. When a discharged capacitor is placed on the load it is effectively placed in parallel with the output cap COUT, and results in a rapid drop in the output voltage VOUT. Switching regulators are not capable of supplying enough instantaneous current to prevent this from occurring. Therefore, the inrush current to the load capacitors should be held below the current limit of the design. Efficiency Efficiency is one of the most important reasons for choosing a switching regulator. The percentile efficiency of a regulator can be determined by dividing the output power of the device by the input power and then multiplying the results by 100. Efficiency losses can occur at any point in a circuit and it is important to analyze the individual losses to determine changes that would yield the most improvement. The efficiency of a circuit can be expressed as: % efficiency = 100% – (% L1 + % L2 + % L3 . . . etc.) L1, L2, L3, etc., are the individual losses as a percentage of the input power. In high efficiency circuits small errors result when expressing losses as a percentage of the output power. |
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