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ADP3162 Datasheet(PDF) 10 Page - Analog Devices |
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ADP3162 Datasheet(HTML) 10 Page - Analog Devices |
10 / 12 page REV. A ADP3162 –10– dictates whether standard threshold or logic-level threshold MOSFETs must be used. Since VGATE < 8 V, logic-level threshold MOSFETs (VGS(TH) < 2.5 V) are strongly recommended. The maximum output current IO determines the RDS(ON) require- ment for the power MOSFETs. When the ADP3162 is operating in continuous mode, the simplifying assumption can be made that in each phase one of the two MOSFETs is always conduct- ing the average inductor current. For VIN = 12 V and VOUT = 1.7 V, the duty ratio of the high-side MOSFET is: D V V V V HSF OUT IN == = 18 5 36 . % (16) The duty ratio of the low-side (synchronous rectifier) MOSFET is: DD LSF MAX HSF MAX () () % =− = 164 (17) The maximum rms current of the high-side MOSFET during normal operation is: I I D I I AA A A HSF MAX O HSF L RIPPLE O () () . . . =× + × = ×+ × = 2 1 3 28 2 036 1 58 328 85 2 2 2 2 (18) The maximum rms current of the low-side MOSFET is: II D D A LSF MAX HFS MAX LSF HSF () ( ) . =× = 11 3 (19) The RDS(ON) for each MOSFET can be derived from the allow- able dissipation. If 10% of the maximum output power is allowed for MOSFET dissipation, the total dissipation in the four MOSFETs of the two-phase converter will be: PV I V A W MOSFET TOTAL OUT O () .. . . =× × = × × = 01 01 18 28 50 (20) Allocating half of the total dissipation for the pair of high-side MOSFETs and half for the pair of low-side MOSFETs, and assuming that the resistive and switching losses of the high-side MOSFET are equal, the required maximum MOSFET resis- tances will be: R P I W A m DS ON HS MAX MOSFET TOTAL HSF MAX () ( ) () ( ) . (. ) . = × = × =Ω 8 50 88 5 86 22 (21) R P I W A m DS ON LS MAX MOSFET TOTAL LSF MAX () ( ) () () . (. ) . = × = × =Ω 4 50 411 3 98 22 (22) An IRL3803 MOSFET from International Rectifier (RDS(ON) = 6 m Ω nominal, 9 mΩ worst-case) is a good choice for both the high-side and low-side. The high-side MOSFET dissipation is: PR I VI Q f I VQ f HSF DS ON HS HSF MAX IN L PK G SW G IN rr SW =× + ×× × × +× × () () () 2 2 (23) where the second term represents the turn-off loss of the MOSFET and the third term represents the turn-on loss due to the stored charge in the body diode of the low-side MOSFET. (In the second term, QG is the gate charge to be removed from the gate for turn-off and IG is the gate turn-off current. From the data sheet, for the IRL3803 the value of QG is about 140 nC and the peak gate drive current (IG) provided by the ADP3412 is about 1 A. In the third term Qrr is the charge stored in the body diode of the low-side MOSFET at the valley of the induc- tor current. The data sheet of the IRL3803 gives 450 nC for the stored charge at 71 A. That value corresponds to a stored charge of 80 nC at the valley of the inductor current. In both terms fSW is the actual switching frequency of the MOSFETs, or 200 kHz. IL(PK) is the peak current in the inductor, or 17.8 A.) Substituting the above data in Equation 23 and using the worst- case value for the MOSFET resistance yields a conduction loss of 0.7 W, a turn-off loss of 1.2 W, and a turn-on loss of 0.08 W. Thus the worst-case total loss in a high-side MOSFET is 1.98 W. The worst-case low-side MOSFET dissipation is: PR I m A W LSF DS ON LS LSF MAX =× = × = () () .. 22 911 3 1 15 Ω (24) (Note that there are no switching losses in the low-side MOSFET.) CIN Selection and Input Current di/dt Reduction In continuous inductor-current mode, the source current of the high-side MOSFET is approximately a square wave with a duty ratio equal to VOUT/VIN and an amplitude of one-half of the maximum output current. To prevent large voltage transients, a low ESR input capacitor sized for the maximum rms current must be used. The maximum rms capacitor current is given by: I I DD A A C RMS O HFS HFS () () .( . ) . =× − × = ×− × = 2 22 28 2 20 36 20 36 6 3 2 2 (25) Note that the capacitor manufacturer’s ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may be placed in parallel to meet size or height requirements in the design. In this example, the input capacitor bank is formed by four 1000 µF, 16 V Rubycon capacitors. The ripple voltage across the three paralleled capacitors is: V I n ESR n D nC f Am FkHz mV C RIPPLE OC C HSF CIN SW () . =× + ×× = × Ω + ×× = 28 2 24 4 036 4 1000 200 90 µ (26) To reduce the input-current di/dt to below the recommended maximum of 0.1 A/ µs, an additional small inductor (L > 1 µH @ 5 A) should be inserted between the converter and the supply bus. That inductor also acts as a filter between the converter and the primary power source. |
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