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ADV476KN35 Datasheet(PDF) 7 Page - Analog Devices |
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ADV476KN35 Datasheet(HTML) 7 Page - Analog Devices |
7 / 12 page ADV476 REV. B –7– Frame Buffer Interface The P0-P7 inputs are used to address the color palette RAM, as shown in Table IV. These inputs are latched on the rising edge of PCLK and address any of the 256 locations in the color pal- ette RAM. The addressed location contains 18 bits of color (6 bits of red, 6 bits of green and 6 bits of blue) information. This data is transferred to the three DACs and is then converted to an analog output (RED, GREEN, BLUE), these outputs then control the red, green and blue electron guns in the monitor. The BLANK input is also latched on the rising edge of PCLK. This is to maintain synchronization with the color data. Table IV. Pixel Select/Color Palette Control Truth Table P0–P7 Addressed by Frame Buffer 00H Color Palette RAM Location 00H 01H Color Palette RAM Location 01H •• • •• • FFH Color Palette RAM Location FFH Pixel Read Mask Register The Pixel Read Mask Register in the ADV476 can be used to implement register level pixel processing, thereby cutting down on software overhead. This is achieved by gating the input pixel stream (P0–P7) with the contents of the pixel read mask regis- ter. The operation is a bitwise logical ANDing of the pixel data. The contents of This register can be accessed and altered at any time by the MPU (D0–D7). Table I shows the relevant control signals. This pixel masking operation can be used to alter the displayed colors without changing the contents of either the video frame buffer or the color palette RAM. The effect of this operation is to partition the color palette into a user determined number of color planes. This process can be used for special effects includ- ing animation, overlays and flashing objects. (See also application note entitled “Animation Using the Pixel Read Mask Register of the ADV47x Series of Video RAM- DACs,” available from Analog Devices (Pub No. E1316–15–10/89). Figure 3. Block Diagram Showing Pixel Read Mask Register Analog Interface The ADV476 has three analog outputs, corresponding to the Red, Green and Blue video signals. The Red, Green and Blue analog outputs of the ADV476 are high impedance current sources. Each one of these three RGB current outputs is capable of directly driving a 37.5 Ω load, such as a doubly-terminated 75 Ω coaxial cable. Figure 4a shows the required configuration for each of the three RGB outputs con- nected into a doubly-terminated 75 Ω load. This arrangement will develop RS-343A video output voltage levels across a 75 Ω monitor. A simple method of driving RS-170 video levels into a 75 Ω monitor is shown in Figure 4b. The output current levels of the DACs remain unchanged but the source termination Figure 4a. Recommended Analog Output Termination for RS-343A resistance, ZS on each of the three DACs is increased from 75 Ω to 150 Ω. More detailed information regarding load terminations for vari- ous output configurations, including RS-343A and RS-170, is available in an application note entitled “Video Formats & Required Load Terminations,” available from Analog Devices. Figure 5 shows the video waveforms associated with the three RGB outputs, driving the doubly terminated 75 Ω load of Fig- ure 4a. The BLANK control input drives the analog outputs to the Black Level. BLANK is asserted prior to horizontal and ver- tical screen retrace. Table V details how the BLANK input modifies the output levels. Figure 4b. Recommended Analog Output Termination for RS-170 |
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