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THS7320IYHCR Datasheet(PDF) 6 Page - Texas Instruments |
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THS7320IYHCR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 35 page V S+ Enable LPF 3-Pole 20-MHz 2V/V 2V/V Level Shift LPF 3-Pole 20-MHz 2V/V 2V/V Level Shift LPF 3-Pole 20-MHz 2V/V 2V/V Level Shift Channel1Input Channel1Output Channel2Input Channel2Output Channel3Input Channel3Output 1MW A 2 1 3 B C Ch1IN GND Ch1OUT Ch2IN EN Ch2OUT Ch3IN V S+ Ch3OUT THS7320 SBOS565B – JULY 2011 – REVISED SEPTEMBER 2012 www.ti.com PIN CONFIGURATION YHC PACKAGE WCSP 9-BALL (TOP VIEW) PIN ASSIGNMENTS NAME NO. I/O DESCRIPTION Channel 1 input A1 I Video input, channel 1 GND A2 I Ground for all circuitry Channel 1 output A3 O Video output, channel 1 Channel 2 input B1 I Video input, channel 2 Video enable pin. Logic high enables the video channels; logic low disables the video EN B2 I channels. Channel 2 output B3 O Video output, channel 2 Channel 3 input C1 I Video input, channel 3 VS+ C2 I Power-supply pin; connect to +2.6 V up to +5 V. Channel 3 output C3 O Video output, channel 3 FUNCTIONAL BLOCK DIAGRAM 6 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Links: THS7320 |
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