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VCA5807PZP Datasheet(PDF) 8 Page - Texas Instruments |
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VCA5807PZP Datasheet(HTML) 8 Page - Texas Instruments |
8 / 64 page VCA5807 SLOS727 – DECEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) AVDD_5V = 5V, AVDD = 3.3V, AC-coupled with 0.1µF at INP and bypassed to ground with 15nF at INM, No active termination, VCNTL= 0V, fIN= 5MHz, LNA = 18dB, PGA = 24dB, LPF Filter = 15MHz, low noise mode, VOUT= –1dBFS (1.8VPP), single-ended VCNTL mode, VCNTLM = GND, 2 k Ω load (ADC Rin), internal 500Ω CW feedback resistor, CMOS CW clocks, at ambient temperature TA = 25°C, unless otherwise noted. Min and max values are specified across full-temperature range with AVDD_5V=5V, AVDD=3.3V PARAMETER TEST CONDITION MIN TYP MAX UNITS CW DOPPLER 1 channel mixer, LNA = 24dB, 500 Ω feedback resistor 0.8 en (RTI) Input voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 24dB, 62.5 Ω feedback resistor 0.33 1 channel mixer, LNA = 24dB, 500 Ω feedback resistor 12 en (RTO) Output voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 24dB, 62.5 Ω feedback resistor 5 1 channel mixer, LNA = 18dB, 500 Ω feedback resistor 1.1 en (RTI) Input voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 18dB, 62.5 Ω feedback resistor 0.5 1 channel mixer, LNA = 18dB, 500 Ω feedback resistor 8.1 en (RTO) Output voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 18dB, 62.5 Ω feedback resistor 4.0 RS = 100Ω, RIN = High Z, FIN = 2MHz (LNA, I/Q mixer and summing NF Noise figure 1.8 dB amplifier/filter) fCW CW Operation Range (2) CW signal carrier frequency, 16X mode / 32X mode 8/4 MHz 1X CLK (16X mode) 8 16X CLK(16X mode) 128 CW Clock frequency MHz 4X CLK(4X mode) 32 32X CLK(32X mode) 128 AC coupled LVDS clock amplitude 0.7 CLKM_16X-CLKP_16X; CLKM_1X-CLKP_1X VPP AC coupled LVPECL clock amplitude 1.6 CLK duty cycle 1X and 16X CLKs 35 65 % Common-mode voltage Internal provided 2.5 V VCMOS CMOS Input clock amplitude 4 5 V CW Mixer conversion loss 4 dB CW Mixer phase noise 1kHz off 2MHz carrier -156 dBc/Hz DR Input dynamic range FIN = 2MHz, LNA=24/18/12dB 160/164/165 dBFS/Hz f1 = 5 MHz, f2 = 5.01 MHz, both tones at -8.5dBm amplitude, 8 channels –50 dBc summed up in-phase, CW feedback resistor = 87 Ω IMD3 Intermodulation distortion f1 = 5 MHz, F2= 5.01 MHz, both tones at –8.5dBm amplitude, Single –60 dBc channel case, CW feed back resistor = 500 Ω I/Q Channel gain matching 16X mode ±0.04 dB I/Q Channel phase matching 16X mode ±0.1 Degree I/Q Channel gain matching 4X mode ±0.04 dB I/Q Channel phase matching 4X mode ±0.1 Degree Image rejection ratio fin = 2.01MHz, 300mV input amplitude, CW clock frequency = 2.00MHz –50 dBc (2) The maximum clock frequency for the 16X and 32X CLK is 128MHz. Hence, the CW operation range is limited to 8MHz in the 16X CW mode. In the 8X, 4X, and 1X modes, higher CW signal frequencies up to 15 MHz can be supported with small degradation in performance, please see CW Clock Selection. 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: VCA5807 |
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