FB

SW

L1

VOUT

LM25019

+

VOUT

(low ripple)

FB

SW

L1

VOUT

LM25019

+

VOUT

(low ripple)

10

ON

LM25019

SNVS952 – DECEMBER 2012

www.ti.com

In a synchronous buck converter, the low side (sync) FET is ‘on’ when the high side (buck) FET is ‘off’. The

inductor current ramps up when the high side switch is ‘on’ and ramps down when the high side switch is ‘off’.

There is no diode emulation feature in this IC, and therefore, the inductor current may ramp in the negative

direction at light load. This causes the converter to operate in continuous conduction mode (CCM) regardless of

the output loading. The operating frequency remains relatively constant with load and line variations. The

operating frequency can be calculated as follows:

(1)

as follows:

(2)

(3)

This regulator regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum

required for the LM25019. In cases where the capacitor ESR is too small, additional series resistance may be

For applications where lower output voltage ripple is required the output can be taken directly from a low ESR

load regulation.

reaches the undervoltage lockout threshold of 4.5V, the IC is enabled.

boot capacitor when SW pin is low.

At high input voltages, the power dissipated in the high voltage regulator is significant and can limit the overall

voltage is driven externally by an alternate voltage source, between 8V and 13V, the internal regulator is

disabled. This reduces the power dissipation in the IC.

Figure 13. Low Ripple Output Configuration

8

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