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TPS43061RTET Datasheet(PDF) 3 Page - Texas Instruments |
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TPS43061RTET Datasheet(HTML) 3 Page - Texas Instruments |
3 / 32 page LOGIC and CONTROL 5.5V or 7.5V LDO R S 1.22V OSC/PLL 1.21V ILIM FB Reverse Current Detect 3.2µA SS COMP FB RT/CLK EN AGND PGOOD PGND LDRV VCC SW HDRV BOOT VIN ISNS- ISNS+ OVP 5µA 1.8µA TPS43061 only O 1.098V 1.342V Slope Compensation TPS43060 TPS43061 www.ti.com SLVSBP4A – DECEMBER 2012 – REVISED DECEMBER 2012 PIN FUNCTIONS (continued) PIN DESCRIPTION NAME NO. Output of an internal LDO and power supply for internal control circuits and gate drivers. VCC is VCC 10 typically 7.5V for the TPS43060 and 5.5 V for the TPS43061. Connect a low ESR ceramic capacitor from this pin to PGND. The recommended capacitance range is from 0.47 µF to 10µF. Bootstrap capacitor node for high-side MOSFET gate driver. Connect the bootstrap capacitor from this BOOT 11 pin to the SW pin. For the TPS43060, also connect a bootstrap diode from VCC to BOOT. Switching node of the boost converter. Connect this pin to the junction of the drain of the low side SW 12 MOSFET, the source of high side synchronous MOSFET and the inductor. High side gate driver output. Connect this pin to the gate of the high side synchronous rectifier HDRV 13 MOSFET. When VIN bias is removed, this pin is connected to SW through an internal 200 k Ω resistor. Power good indicator. This pin is an open-drain output. A 10 k Ω pull-up resistor is recommended PGOOD 14 between PGOOD and VCC or an external logic supply pin. Enable pin with internal pull-up current source. Floating this pin will enable the IC. Pull below 1.2 V to EN 15 enter low current standby mode. Pull below 0.4 V to enter shutdown mode. The EN pin can be used to implement adjustable undervoltage lockout (UVLO) using two resistors. Analog signal ground of the IC. AGND should be connected to PGND at a single point on printed circuit AGND 16 board. The PowerPAD should be connected to AGND. If possible, use thermal vias to connect to an internal PowerPAD 17 ground plane for improved power dissipation. FUNCTIONAL BLOCK DIAGRAM Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS43060 TPS43061 |
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