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LUCL9310GP-D Datasheet(PDF) 7 Page - Agere Systems

Part # LUCL9310GP-D
Description  Line Interface and Line Access Circuit Full-Feature SLIC,Ringing Relay,and Test Access Device
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Manufacturer  AGERE [Agere Systems]
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LUCL9310GP-D Datasheet(HTML) 7 Page - Agere Systems

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Data Sheet
July 2001
Full-Feature SLIC, Ringing Relay, and Test Access Device
L9310 Line Interface and Line Access Circuit
Agere Systems Inc.
7
Description (continued)
The various test modes are achieved through a series
of integrated analog switches that can reconfigure the
SLIC to provide normal SLIC operation or the appropri-
ate test function. Details are given in the Special Func-
tions, Line Test section of this data sheet.
Test modes are achieved through the device state
table. When entering a test mode, the state of the SLIC
is unchanged; thus, testing can be done with the SLIC
in forward and reverse battery active modes. Addition-
ally, via the line break switches associated with the ring
relay, use of a tip open or ring open state is used to
make single-ended voltage and current measurements.
Data control is via a parallel latched data control
scheme. Data latches are edge-level sensitive. Data is
latched in when the LATCH control input goes low.
While LATCH is low, the user cannot change the data
control inputs. The data control inputs may only be
changed when LATCH is high.
Incorporation of data latches allows for data control
information and loop supervision information to be
passed to and from the SLIC via data buses rather than
on a per-line basis, thus minimizing routing complexity
and board routing area.
A device RESET pin is included. When this pin is low,
the logic inputs are overridden and the device will be
reset into SLIC forward disconnect state and the switch
into the all-off state. NSTAT is forced to the on-hook
condition when RESET is low.
The overall device protection is achieved through a
combination of an external secondary protector, along
with an integrated thermal shutdown feature, a battery
voltage window comparator, the break switch foldback
characteristic, and the dc/dynamic current-limit
response of the break and tip return switches.
For protection against long duration fault conditions,
such as power cross and tip/ring shorts, a thermal shut-
down mechanism is integrated into the device. Upon
reaching the thermal shutdown temperature, the device
will enter an all-off mode. Upon cooling, the device will
re-enter the state it was in prior to thermal shutdown.
Hysteresis is built in to prevent oscillation. During this
mode, the NSTAT supervision output overrides the
actual loop status and forces an off-hook.
The line break switches and tip return switch are
current-limited switches. The current-limit mechanism
limits current through the switch to the specified dc cur-
rent limit under low frequency or dc faults (power cross
and/or tip/ring to ground short) and limits the current to
the specified dynamic current-limit response under
transient faults, such as lightning.
A foldover characteristic is incorporated into the line
break switches within their I-V curve. Under voltage
conditions higher than the normal operating range,
such as may be seen under an extreme lightning or
power cross fault condition, the line break switch will
foldover into a low-current state. This feature allows for
more relaxed specifications on the ring side protector,
thus allowing for higher-voltage ringing signals. (Tip
side protector is limited by the requirements on the tip
return switch.) This feature is part of the overall device
protection scheme.
This device uses a window comparator to force an all-
off condition if the battery drops below, or rises above,
a specified threshold.
Upon loss of VBAT1, the L9310 will automatically enter
an all-off mode. The device will enter this mode if the
magnitude of the battery drops below a nominal 15 V
and will remain in this mode until the magnitude of the
battery rises above a typical 20 V. During this mode,
the NSTAT supervision output will override the actual
hook status and force an off-hook or logic low.
When the device is in the scan mode, because of the
design of the scan clamp circuit, common-mode cur-
rent can be forced into or out of the battery supply.
Because of this, and depending upon power supply
design, the magnitude of the battery may rise above
the maximum operating condition during extended lon-
gitudinal currents or during a power cross fault condi-
tion. To prevent excess current from being forced into
or out of the battery, if the magnitude of the battery
rises typically above 75 V to 80 V, the device will enter
an all-off state. The device will remain in the all-off state
until the magnitude of the battery drops into the normal
operating range. During this mode, the NSTAT supervi-
sion output will override the actual hook status and
force an off-hook or logic low.
See the Protection section of this data sheet for more
details on device protection. Please contact your Agere
Account Representative for a recommended secondary
protection device.
Longitudinal balance is consistent with European ETSI
and North American GR-909 requirements.


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