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LU6612-T64-DB Datasheet(PDF) 10 Page - Agere Systems |
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LU6612-T64-DB Datasheet(HTML) 10 Page - Agere Systems |
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10 / 36 page  LU6612 Data Sheet FASTCAT Single-FET for 10Base-T/100Base-TX July 2000 10 Lucent Technologies Inc. Table 2. MII Management Pins (2) Table 3. 10/100 Mbits/s Twisted-Pair (TP) Interface Pins (4) TX_ER/ TXD[4] I29 Transmit Coding Error. When driven high, this signal causes the encoder to inten- tionally corrupt the byte being transmitted across the MII (00100 will be transmitted). When the encoder/decoder bypass bit is set, this input serves as the TXD[4] input. When in 10 Mbits/s mode and SERIAL_SEL (register 30, bit 1) is active-high, this pin is ignored. RX_EN I 28 Receive Enable. When this pin is high, the outputs (RXD[3:0], RX_ER, RX_CLK, RX_DV) are enabled. This pin has an internal 100 k Ω pull-up resistor. Signal Type Pin Description MDC I 26 Management Data Clock. This is the timing reference for the transfer of data on the MDIO signal. This signal may be asynchronous to RX_CLK and TX_CLK. The standard clock rate is 2.5 MHz, the maximum clock rate is 12.5 MHz. When running MDC above 6.25 MHz, MDC must be synchronous with LSCLK and have a setup time of 15 ns and a hold time of 5 ns with respect to LSCLK. MDIO IO 25 Management Data Input/Output. This I/O is used to transfer control and status infor- mation between LU6612 and the station management. Control information is driven by the station management synchronous with MDC. Status information is driven by the LU6612 synchronous with MDC. Signal Type Pin Description RX I 63 Received Data. Positive differential received 125 Mbaud MLT3 or 10 Mbaud Manchester data from magnetics. RY I 62 Received Data. Negative differential received 125 Mbaud MLT3 or 10 Mbaud Manchester data from magnetics. TX O 8 Transmit Data. Positive differential transmit 125 Mbaud MLT3 or 10 Mbaud Manchester data to magnetics. TY O 9 Transmit Data. Negative differential transmit 125 Mbaud MLT3 or 10 Mbaud Manchester data to magnetics. Signal Type Pin Description Pin Information (continued) Table 1. MII/Serial Interface Pins (17) (continued) |
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