100328QC datasheet(6/14 Pages) FAIRCHILD

Part #	100328QC

Description	Low Power Octal ECL/TTL Bi-Directional Translator with Latch

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Manufacturer	FAIRCHILD [Fairchild Semiconductor]

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Commercial Version (Continued)

SOIC and PLCC ECL-to-TTL AC Electrical Characteristics

VEE = −4.2V to −5.7V, VTTL = +4.5V to +5.5V, CL = 50 pF

Note 11: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same

packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in oppo-

site directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.

Symbol

Parameter

TC = 0°CTC = 25°CTC = 85°C

Units

Conditions

Min

Max

Min

Max

Min

Max

tPLH

En to Tn

2.3

5.4

2.4

5.4

2.6

5.7

ns

Figures 3, 4

tPHL

(Transparent)

tPLH

LE to Tn

3.1

7.0

3.1

7.0

3.3

7.5

ns

Figures 3, 4

tPHL

tPZH

OE to Tn

3.4

8.25

3.7

8.75

4.0

9.5

ns

Figures 3, 5

tPZL

(Enable Time)

3.8

9.0

4.0

9.0

4.3

9.75

tPHZ

OE to Tn

3.2

8.75

3.3

8.75

3.5

9.0

ns

Figures 3, 5

tPLZ

(Disable Time)

3.0

7.5

3.4

8.5

4.1

9.75

tPHZ

DIR to Tn

2.7

8.0

2.8

8.5

3.1

8.75

ns

Figures 3, 6

tPLZ

(Disable Time)

2.8

7.25

3.1

7.75

4.0

9.0

tSET

En to LE

1.0

ns

Figures 3, 4

tHOLD

En to LE

2.0

2.5

ns

Figures 3, 4

tPW(H)

Pulse Width LE

4.0

ns

Figures 3, 4

tOSHL

Maximum Skew Common Edge

PLCC Only

Output-to-Output Variation

600

ps

(Note 11)

Data to Output Path

tOSLH

Maximum Skew Common Edge

PLCC Only

Output-to-Output Variation

850

ps

(Note 11)

Data to Output Path

tOST

Maximum Skew Opposite Edge

PLCC Only

Output-to-Output Variation

1350

ps

(Note 11)

Data to Output Path

tPS

Maximum Skew

PLCC Only

Pin (Signal) Transition Variation

950

ps

(Note 11)

Data to Output Path

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