© 2000 Fairchild Semiconductor Corporation

DS009883

www.fairchildsemi.com

July 1988

Revised August 2000

100344

Low Power 8-Bit Latch with Cut-Off Drivers

General Description

The 100344 contains eight D-type latches, individual inputs

(LE), and output enable pin (OEN). A Q output follows its D

input when both E and LE are LOW. When either E or LE

(or both) are HIGH, a latch stores the last valid data

present on its D input prior to E or LE going HIGH.

A HIGH on OEN holds the outputs in a cut-off state. The

cut-off state is designed to be more negative than a normal

ECL LOW level. This allows the output emitter-followers to

turn off when the termination supply is

−2.0V, presenting a

high impedance to the data bus. This high impedance

reduces termination power and prevents loss of low state

noise margin when several loads share the bus.

The 100344 outputs are designed to drive a doubly termi-

nated 50

Ω transmission line (25Ω load impedance). All

inputs have 50 k

Ω pull-down resistors.

Features

s Cut-off drivers

s Drives 25

Ω load

s Low power operation

s 2000V ESD protection

s Voltage compensated operating range

= −4.2V to −5.7V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

24-Pin DIP

28-Pin PLCC

Logic Symbol

Order Number

Package Number

Package Description

100344PC

N24E

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

100344QC

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

100344QI

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (

−40°C to +85°C)