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AD9129 Datasheet(PDF) 5 Page - Analog Devices |
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AD9129 Datasheet(HTML) 5 Page - Analog Devices |
5 / 68 page Data Sheet AD9119/AD9129 Rev. 0 | Page 5 of 68 SERIAL PORT AND CMOS PIN SPECIFICATIONS VDDA = VDD = 1.8 V, VSSA = −1.5 V, IOUTFS = 33 mA, TA = −40°C to +85°C. Table 4. Parameter Symbol Test Comments/Conditions Min Typ Max Unit WRITE OPERATION See Figure 126 SCLK Clock Rate fSCLK, 1/tSCLK 20 MHz SCLK Clock High tHIGH 20 ns SCLK Clock Low tLOW 20 ns SDIO to SCLK Setup Time tDS 10 ns SCLK to SDIO Hold Time tDH 5 ns CS to SCLK Setup Time tS 10 ns SCLK to CS Hold Time tH 5 ns READ OPERATION See Figure 127 SCLK Clock Rate fSCLK, 1/tSCLK 20 MHz SCLK Clock High tHIGH 20 ns SCLK Clock Low tLOW 20 ns SDIO to SCLK Setup Time tDS 10 ns SCLK to SDIO Hold Time tDH 5 ns CS to SCLK Setup Time tS 10 ns SCLK to SDIO (or SDO) Data Valid Time tDV 10 ns CS to SDIO (or SDO) Output Valid to High-Z tEZ 2 INPUTS (SDI, SDIO, SCLK, CS) Voltage In High VIH 1.2 1.8 V Voltage In Low VIL 0 0.4 V Current In High IIH +75 µA Current In Low IIL −150 µA OUTPUTS (SDIO, SYNC) Voltage Out High VOH 1.3 2.0 V Voltage Out Low VOL 0 0.3 V Current Out High IOH 4 mA Current Out Low IOL 4 mA |
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