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2

Logic Symbols

IEEE/IEC

Connection Diagram

Pin Descriptions

Truth Table

H

HIGH Voltage Level

L

LOW Voltage Level

Z

High Impedance

X

Immaterial

Functional Description

The AC/ACT373 contains eight D-type latches with 3-

STATE standard outputs. When the Latch Enable (LE)

this condition the latches are transparent, i.e., a latch out-

put will change state each time its D-type input changes.

When LE is LOW, the latches store the information that

was present on the D-type inputs a setup time preceding

the HIGH-to-LOW transition of LE. The 3-STATE standard

outputs are controlled by the Output Enable (OE) input.

When OE is LOW, the standard outputs are in the 2-state

mode. When OE is HIGH, the standard outputs are in the

high impedance mode but this does not interfere with

entering new data into the latches.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Pin Names

Description

Data Inputs

LE

Latch Enable Input

OE

Output Enable Input

3-STATE Latch Outputs

Inputs

Outputs

LE

OE

XH

X

Z

HL

L

L

HL

H

H

LL

X