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IS62WV5128DBLL Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc

Part # IS62WV5128DBLL
Description  512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS62WV5128DBLL Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev.  A
02/09/2012
Copyright©2012IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatanytimewithout
notice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersareadvisedtoobtainthelat-
estversionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts.
IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionoftheproductcanreason-
ablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenotauthorizedforuseinsuchapplications
unlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances
IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL
512K x 8 LOW VOLTAGE, 
ULTRA LOW POWER CMOS STATIC RAM   
           
FEATURES
• High-speedaccesstime:35,45,55ns
• CMOSlowpoweroperation
36mW(typical)operating
9µW(typical)CMOSstandby
• TTLcompatibleinterfacelevels
• Singlepowersupply
1.65V–2.2VVdd (IS62WV5128dALL)
2.3V–3.6VVdd (IS62WV5128dBLL)
• Fullystaticoperation:noclockorrefresh
required
• Threestateoutputs
• IndustrialandAutomotivetemperaturesupport
• Lead-freeavailable
DESCRIPTION
The
ISSI IS62WV5128DALL / IS62WV5128DBLL are
high-speed,4MbitstaticRAMsorganizedas512Kwords
by8bits.Itisfabricatedusing
ISSI'shigh-performance
CMOStechnology.Thishighlyreliableprocesscoupled
with innovative circuit design techniques, yields high-
performanceandlowpowerconsumptiondevices.
When CS1 is HIGH (deselected) the device assumes
astandbymodeatwhichthepowerdissipationcanbe
reduceddownwithCMOSinputlevels.
EasymemoryexpansionisprovidedbyusingChipEnable
andOutputEnableinputs.TheactiveLOWWriteEnable
(WE)
controlsbothwritingandreadingofthememory.
The IS62WV5128DALL and IS62WV5128DBLL are
packaged in the JEDEC standard 32-pinTSOP (TYPE
I),32-pinsTSOP(TYPEI),32-pinTSOP(TypeII),32-pin
SOPand36-pinminiBGA.
FUNCTIONAL BLOCK DIAGRAM
FEBRUARY 2012
A0-A18
CS1
OE
WE
512K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7


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