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74ACTQ18825SSC Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74ACTQ18825SSC Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2000 Fairchild Semiconductor Corporation DS010955 www.fairchildsemi.com September 1991 Revised January 2000 74ACTQ18825 18-Bit Buffer/Line Driver with 3-STATE Outputs General Description The ACTQ18825 contains eighteen non-inverting buffers with 3-STATE outputs designed to be employed as a mem- ory and address driver, clock driver, or bus oriented trans- mitter/receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 18-bit operation. The ACTQ18825 utilizes Fairchild FACT Quiet Series ™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO ™ output control and undershoot cor- rector for superior performance. Features s Utilizes Fairchild FACT Quiet Series technology s Broadside pinout allows for easy board layout s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin output skew s Separate control logic for each byte s Extra data width for wider address/data paths or buses carrying parity s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loading specs for both 50 pF and 250 pF loads Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions FACT ™, FACT Quiet Series™ and GTO™ are trademarks of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACTQ18825SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACTQ18825MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Pin Names Description OEn Output Enable Input (Active LOW) I0–I17 Inputs O0–O17 Outputs |
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