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MTD56 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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MTD56 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 10 page www.fairchildsemi.com 2 Connection Diagram Truth Table (Note 2) H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level = LOW-to-HIGH Transition. Note 2: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control pins. Inputs Data I/O Output Operation Mode OE1 DIR1 CPAB1 CPBA1 SAB1 SBA1 A0–7 B0–7 H X H or L H or L X X Isolation H X X X X Input Input Clock An Data into A Register H X X X X Clock Bn Data Into B Register L H X X L X An to Bn — Real Time (Transparent Mode) L H X L X Input Output Clock An Data to A Register L H H or L X H X A Register to Bn (Stored Mode) L H X H X Clock An Data into A Register and Output to Bn L L X X X L Bn to An — Real Time (Transparent Mode) L L X X L Output Input Clock Bn Data into B Register L L X H or L X H B Register to An (Stored Mode) L L X X H Clock Bn into B Register and Output to An |
Similar Part No. - MTD56 |
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Similar Description - MTD56 |
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