3.2 mm x 5.0 mm Ceramic Package SMD Oscillator, LVDS

ISM89 Series

12/10_A

Specifications subject to change without notice

Page 1

Recommended Pad Layout

Dimension Units: mm

Pin

Connection

1

Enable

2

N.C.

3

4

Output

5

Comp. Output

6

Product Features:

Applications:

Surface Mount Package

Test Equipment

Low Jitter

Server & Storage

Reflow Compatible

Sonet /SDH

Compatible with Leadfree Processing

NOTE: A 0.01 µF bypass capacitor is recommended between Vcc (pin 6) and GND (pin 3) to minimize power supply noise.

Frequency

80 MHz to 250.000 MHz

Output Level

Duty Cycle

50% ±5%

Rise / Fall Time

0.7 nS Max.

Output Load

100

 (offset 1.25V typ.)

Frequency Stability

±25ppm

Enable Phase Delay

2 mS Max.

Disable Phase

Delay

200 nS Max.

Supply Voltage

See Input Voltage Table, Tolerance ±5 %

Current

55 mA Typical

Operating

-40

Storage

Integrated Jitter

RMS

0.3 typ. (12 KHz to 20 MHz Band)

Part Number Guide

Sample Part Number:

Package

Input

Voltage

Operating

Temperature

Symmetry

(Duty Cycle)

Output

Stability

(in ppm)

Enable /

Disable

Frequency

ISM89 -

3 = 3.3 V

1 = 0

 C to +70 C

5 = 45 / 55 Max.

8 = LVDS

A =

25

H = Enable

- 156.250 MHz

6 = 2.5 V

6 = -10

 C to +70 C

3 = -20

 C to +70 C

2 = -40

 C to +85 C