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UCC2817DG4 Datasheet(PDF) 8 Page - Texas Instruments |
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UCC2817DG4 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 32 page UCC2817, UCC2818, UCC3817, UCC3818 BiCMOS POWER FACTOR PREREGULATOR SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 8 www.ti.com APPLICATION INFORMATION power stage LBOOST : The boost inductor value is determined by: L BOOST + V IN(min) D ( DI fs) where D is the duty cycle, ∆I is the inductor ripple current and fS is the switching frequency. For the example circuit a switching frequency of 100 kHz, a ripple current of 875 mA, a maximum duty cycle of 0.688 and a minimum input voltage of 85 VRMS gives us a boost inductor value of about 1 mH. The values used in this equation are at the peak of low line, where the inductor current and its ripple are at a maximum. COUT : Two main criteria, the capacitance and the voltage rating, dictate the selection of the output capacitor. The value of capacitance is determined by the holdup time required for supporting the load after input ac voltage is removed. Holdup is the amount of time that the output stays in regulation after the input has been removed. For this circuit, the desired holdup time is approximately 16 ms. Expressing the capacitor value in terms of output power, output voltage, and holdup time gives the equation: C OUT + 2 P OUT Dt V OUT 2 * V OUT(min) 2 In practice, the calculated minimum capacitor value may be inadequate because output ripple voltage specifications limit the amount of allowable output capacitor ESR. Attaining a sufficiently low value of ESR often necessitates the use of a much larger capacitor value than calculated. The amount of output capacitor ESR allowed can be determined by dividing the maximum specified output ripple voltage by the inductor ripple current. In this design holdup time was the dominant determining factor and a 220- µF, 450-V capacitor was chosen for the output voltage level of 385 VDC at 250 W. Power switch selection: As in any power supply design, tradeoffs between performance, cost and size have to be made. When selecting a power switch, it can be useful to calculate the total power dissipation in the switch for several different devices at the switching frequencies being considered for the converter. Total power dissipation in the switch is the sum of switching loss and conduction loss. Switching losses are the combination of the gate charge loss, COSS loss and turnon and turnoff losses: P GATE + Q GATE V GATE fs P COSS + 1 2 C OSS V2 OFF fs P ON ) P OFF + 1 2 V OFF I L t ON ) t OFF fs where QGATE is the total gate charge, VGATE is the gate drive voltage, fS is the clock frequency, COSS is the drain source capacitance of the MOSFET, IL is the peak inductor current, tON and tOFF are the switching times (estimated using device parameters RGATE, QGD and VTH) and VOFF is the voltage across the switch during the off time, in this case VOFF = VOUT. |
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