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DS1339A Datasheet(PDF) 4 Page - Maxim Integrated Products |
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DS1339A Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 19 page  DS1339A Low-Current, I2C, Serial Real-Time Clock 4 Maxim Integrated WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup mode. Note 2: Limits are 100% production tested at TA = +25NC and TA = +85NC. Limits over the operating temperature range and rel- evant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed. Note 3: SCL only. Note 4: SDA and SQW/INT. Note 5: ICCA—SCL at fSCL max, VIL = 0.0V, VIH = VCC, trickle charger disabled. Note 6: Specified with the I2C bus inactive, VIL = 0.0V, VIH = VCC, trickle charger disabled. Note 7: VCC must be less than 3.63V if the 200I resistor is selected. Note 8: Using recommended crystal on X1 and X2. Note 9: After this period, the first clock pulse is generated. Note 10: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal) to bridge the undefined region of the falling edge of SCL. Note 11: The maximum tHD:DAT need only be met if the device does not stretch the low period (tLOW) of the SCL signal. Note 12: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT R to 250ns must then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output the next data bit to the SDA line tR(MAX) + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released. Note 13: CB—total capacitance of one bus line in pF. Note 14: Guaranteed by design; not production tested. Note 15: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set. Note 16: The DS1339A can detect any single SCL clock held low longer than tTIMEOUTMIN. The device’s I2C interface is in reset state and can receive a new START condition when SCL is held low for at least tTIMEOUTMAX. Once the device detects this condition, the SDA output is released. The oscillator must be running for this function to work. Note 17: This delay applies only if the oscillator is running. If the oscillator is disabled or stopped, no power-up delay occurs. AC ELECTRICAL CHARACTERISTICS (continued) (VCC = MIN to MAX, TA = -40NC to +85NC, unless otherwise noted.) (Note 2, Figure 1) POWER-UP/DOWN CHARACTERISTICS (TA = -40NC to +85NC, unless otherwise noted.) (Note 2, Figure 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Capacitive Load for Each Bus Line CB (Note 13) 400 pF I/O Capacitance (SDA, SCL) CI/O (Note 14) 10 pF Oscillator Stop Flag (OSF) Delay tOSF (Note 15) 100 ms Timeout Interval tTIMEOUT (Note 16) 25 35 ms PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Recovery at Power-Up tREC (Note 17) 1 2 ms VCC Slew Rate; VPF to 0V tVCCF 1/50 V/Fs VCC Slew Rate; 0V to VPF tVCCR 1/1 V/Fs |
Similar Part No. - DS1339A_13 |
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Similar Description - DS1339A_13 |
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