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VCX163245 Translator Power Up Sequence Recommendations

To guard against power up problems, some simple guide-

lines need to be adhered to. The VCX163245 is designed

Therefore the first recommendation is to begin by powering

guard against bus contentions and oscillations as all A Port

and B Port outputs will be disabled. To ensure the high

mum value of the resistor is determined by the current

pins should be placed at logic LOW (0V) level, this will

ensure that the B-side bus pins are configured as inputs to

help guard against bus contention and oscillations. B-side

Data Inputs should be driven to a valid logic level (0V or

proper device operation. Upon completion of these steps

the device can then be configured for the users desired

operation. Following these steps will help to prevent possi-

ble damage to the translator device as well as other system

components.

Logic Diagrams

Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.