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EP4CE10F17C8N Datasheet(PDF) 10 Page - Altera Corporation |
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EP4CE10F17C8N Datasheet(HTML) 10 Page - Altera Corporation |
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10 / 42 page  1–10 Chapter 1: Cyclone IV Device Datasheet Operating Conditions Cyclone IV Device Handbook, October 2012 Altera Corporation Volume 3 Example 1–1 shows how to calculate the change of 50-I/O impedance from 25°C at 3.0 V to 85°C at 3.15 V. Pin Capacitance Table 1–11 lists the pin capacitance for Cyclone IV devices. Example 1–1. Impedance Change R V = (3.15 – 3) × 1000 × –0.026 = –3.83 R T = (85 – 25) × 0.262 = 15.72 Because R V is negative, MFV = 1 / (3.83/100 + 1) = 0.963 Because R T is positive, MFT = 15.72/100 + 1 = 1.157 MF = 0.963 × 1.157 = 1.114 Rfinal = 50 × 1.114 = 55.71 Table 1–11. Pin Capacitance for Cyclone IV Devices (1) Symbol Parameter Typical – Quad Flat Pack (QFP) Typical – Quad Flat No Leads (QFN) Typical – Ball-Grid Array (BGA) Unit CIOTB Input capacitance on top and bottom I/O pins 7 7 6 pF CIOLR Input capacitance on right I/O pins 7 7 5 pF CLVDSLR Input capacitance on right I/O pins with dedicated LVDS output 8 8 7 pF CVREFLR (2) Input capacitance on right dual -purpose VREF pin when used as VREF or user I/O pin 21 21 21 pF CVREFTB (2) Input capacitance on top and bottom dual -purpose VREF pin when used as VREF or user I/O pin 23 (3) 23 23 pF CCLKTB Input capacitance on top and bottom dedicated clock input pins 7 7 6 pF CCLKLR Input capacitance on right dedicated clock input pins 6 6 5 pF Notes to Table 1–11: (1) The pin capacitance applies to FBGA, UBGA, and MBGA packages. (2) When you use the VREF pin as a regular input or output, you can expect a reduced performance of toggle rate and tCO because of higher pin capacitance. (3) CVREFTB for the EP4CE22 device is 30 pF. |
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