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74VCXH162374MTD Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74VCXH162374MTD Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2000 Fairchild Semiconductor Corporation DS500226 www.fairchildsemi.com January 2000 Revised March 2000 74VCXH162374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26 Ω Series Resistors in Outputs General Description The VCXH162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus ori- ented applications. The device is byte controlled. A buff- ered clock (CP) and output enable (OE) are common to each byte and can be shorted together for full 16-bit opera- tion. The VCXH162374 data inputs include active bushold cir- cuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. The 74VCXH162374 is also designed with 26 Ω series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceivers/transmitters. The 74VCXH162374 is designed for low voltage (1.65V to 3.6V) VCC applications with output compatibility up to 3.6V. The 74VCXH162374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Features s 1.65V–3.6V VCC supply operation s 3.6V tolerant control inputs and outputs s Bushold data inputs eliminates the need for external pull-up/pull-down resistors s 26 Ω series resistors in outputs s tPD (CLK to On) 3.4 ns max for 3.0V to 3.6V VCC 4.8 ns max for 2.3V to 2.7V VCC 9.6 ns max for 1.65V to 1.95V VCC s Static Drive (IOH/IOL) ±12 mA @ 3.0V V CC ±8 mA @ 2.3V V CC ±3 mA @ 1.65V V CC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Note 1: Use this Order Number to receive devices in Tape and Reel. Logic Symbol Pin Descriptions Order Number Package Package Descriptions Number 74VCXH162374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TUBES] 74VCXH162374MTX (Note 1) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Pin Names Description OEn Output Enable Input (Active LOW) CPn Clock Pulse Input I0–I15 Bushold Inputs O0–O15 Outputs |
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