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MPC2105C Datasheet(PDF) 11 Page - Motorola, Inc |
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MPC2105C Datasheet(HTML) 11 Page - Motorola, Inc |
11 / 18 page MPC2105C •MPC2106C 11 MOTOROLA FAST SRAM TAG RAM RESET FUNCTION TRUTH TABLE (See Notes 1 and 2) TCLR CLK TWE TAG0 – TAG11 DIRTYOUT MATCH Operation POWER L L – H H High–Z L(3) L(3) Reset Status Active L L – H L — — — Not Allowed — NOTES: 1. H = VIH, L = VIL, X = don‘t care, — = undefined. 2. TG is X for this table. 3. These are output states. READ FUNCTION TRUTH TABLE (See Notes 1, 2, and 3) TG TWE CLK TAG0 – TAG11 VALIDIN DIRTYIN DIRTYOUT MATCH Operation L H X Dout — — Dout Dout Read Tag I/O H X X High–Z — — — — Tag I/O Disable WRITE FUNCTION TRUTH TABLE (See Notes 1 and 2) TG TWE CLK TAG0 – TAG11 VALIDIN DIRTYIN DIRTYOUT MATCH Operation H L L – H Din — — — L Write Tag I/O L L L – H — — — — — Not Allowed NOTES: 1. H = VIH, L = VIL, X = don‘t care, — = undefined. 2. This table applies when RESET and PWRDN are high. 3. Dout in this case is the same as Din. The input data is written through to the outputs during the write operation. MATCH FUNCTION TRUTH TABLE (See Notes 1 through 4) TG TWE TAG0 – TAG11 VALIDIN(4) DIRTYIN(4) MATCH Operation X X — — — Dout Selected L H Dout — — L Read Tag I/O H L Din Din Din L Write Tag I/O, Status Bits H H TAGin L — L Invalid Data – Dedicated Status Bits H H TAGin H — H Match – Dedicated Status Bits NOTES: 1. H = VIH, L = VIL, X = don‘t care, — = undefined. 2. M = high if TAGin equals the memory contents at the address; M = low if TAGin does not equal the contents at that address. 3. PWRDN and RESET are high for this table. GS and CLK are X. 4. This column represents the stored memory cell data for the given status bit at the selected address. |
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