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YGV639 Datasheet(PDF) 7 Page - YAMAHA CORPORATION |
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YGV639 Datasheet(HTML) 7 Page - YAMAHA CORPORATION |
7 / 34 page YGV639 7 Monitor Interface (29) Pin Name Num. I/O Function Power Supply Group Level Drive DR5-0 6 O Digital Video: R Output VD3 LVCMOS 2mA DG5-0 6 O Digital Video: G Output VD3 LVCMOS 2mA DB5-0 6 O Digital Video: B Output VD3 LVCMOS 2mA VSYNC_N 1 O Vertical synchronization signal output (dual-purpose pin) VD3 LVCMOS 2mA HCSYNC_N 1 O Horizontal / Composite synchronization signal output (dual-purpose pin) VD3 LVCMOS 2mA BLANK_N 1 O Blank signal output pin (dual-purpose pin) VD3 LVCMOS 2mA DOTCLK 1 O Dot clock output VD3 LVCMOS 2mA CLKV 1 O Vertical clock output (dual-purpose pin) VD3 LVCMOS 2mA STARTH 1 I/O Horizontal start signal output (dual-purpose pin) VD3 LVCMOS 2mA STARTV 1 O Vertical start signal output (dual-purpose pin) VD3 LVCMOS 2mA LOADH 1 O Horizontal load signal output (dual-purpose pin) VD3 LVCMOS 2mA POL 1 O Polarity inversion output (dual-purpose pin) VD3 LVCMOS 2mA OUTENV 1 O Output enable signal (dual-purpose pin) VD3 LVCMOS 2mA TCONE 1 I Timing controller select pin (with a pull-down resistor) VD3 LVCMOS Clock (8) Pin Name Num. I/O Function Power Supply Group Level Drive XIN 1 I Reference clock input pin VD3 XOUT 1 O Crystal connection pin VD3 DTCKIN 1 I Dot clock input pin VD3 LVCMOS DTCKS_N 1 I Dot clock input selection pin VD3 LVCMOS PLLCTL3-1 3 I/O PLL multiplication ratio setting pin (dual-purpose pin) VD3 LVCMOS 2mA PLLCTL0 1 I PLL multiplication ratio setting pin VD3 LVCMOS For Device (43) Pin Name Num. I/O Function Attribute Power Supply Group Level Drive XTEST2-0 3 I Test pin - VD3 LVCMOS VDD33 11 - Digital power supply pin - - VDD5 1 - CPU interface power supply pin - - VSS 14 - Digital VSS pin - - PLLVDD 1 - PLL power supply pin - - AVDD1, AVDD2 2 - Analog Front End power supply pin - - AVSS 2 - Analog Front End VSS pin - - OCPEN 1 I Reset of the over-current protection circuit Over-current protection circuit Enable/Disable switching pin 5V tolerant VD5 CMOS TEST_REG 1 I Over-current protection circuit Enable/Disable control 5V tolerant VD5 CMOS OCP_N 1 O Over-current detection output - VD5 CMOS 4mA VDDCORE 3 - Capacitor connection pin for core power supply - VDDIN VOUT18 1 - 1.8V digital power supply output - VDDIN VDDIN 2 - 3.3V input for core power supply (1.8V) - - Note: VC1E has no pull-up resistors. Pull up a pin externally as necessary. ● The meaning of a sign of [I/O] column is as follows: I: Input pin I$: Schmitt trigger input pin O: Output pin OT: 3-state output pin OD: Open-drain output pin |
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