© 2000 Fairchild Semiconductor Corporation

DS006348

www.fairchildsemi.com

August 1986

Revised March 2000

DM74LS09

Quad 2-Input AND Gates with Open-Collector Outputs

General Description

This device contains four independent gates each of which

performs the logic AND function. The open-collector out-

puts require external pull-up resistors for proper logical

operation.

Pull-Up Resistor Equations

Where:

for all outputs tied to pull-up resistor

all inputs tied to pull-up resistor

all inputs tied to pull-up resistor

Ordering Code:

Devices also available in Tape and Reel.

Connection Diagram

Function Table

Y

= AB

H

= HIGH Logic Level

L

= LOW Logic Level

Order Number

Package Number

Package Description

DM74LS09M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

DM74LS09N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs

Output

AB

Y

LLL

LH

L

HL

L

HHH