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MPIC2117D Datasheet(PDF) 2 Page - Motorola, Inc |
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MPIC2117D Datasheet(HTML) 2 Page - Motorola, Inc |
2 / 6 page MPIC2117 2 Motorola Power Products Division Advanced Data SIMPLIFIED BLOCK DIAGRAM PULSE GEN UV DETECT PULSE FILTER HV LEVEL SHIFT VS VB HO R R S Q VCC IN COM UV DETECT ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Rating Symbol Min Max Unit High Side Floating Supply Absolute Voltage VB VS VHO VCC VIN –0.3 625 VDC High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Logic Supply Voltage Logic Input Voltage VB VS VHO VCC VIN –0.3 VB–25 VS–0.3 –0.3 –0.3 625 VB+0.3 VB+0.3 25 VCC+0.3 VDC High Side Floating Output Voltage Logic Supply Voltage Logic Input Voltage S VHO VCC VIN B–25 VS–0.3 –0.3 –0.3 B+0.3 VB+0.3 25 VCC+0.3 Logic Supply Voltage Logic Input Voltage VCC VIN –0.3 –0.3 25 VCC+0.3 Logic Input Voltage VIN –0.3 VCC+0.3 Allowable Offset Supply Voltage Transient dVS/dt – 50 V/ns *Package Power Dissipation @ TA ≤ +25°C (8 Lead DIP) (8 Lead SOIC) PD – – – 1.0 0.625 Watt Thermal Resistance, Junction to Ambient (8 Lead DIP) (8 Lead SOIC) R θJA – – 125 200 °C/W Operating and Storage Temperature Tj, Tstg –55 150 °C Lead Temperature for Soldering Purposes, 10 seconds TL – 260 °C RECOMMENDED OPERATING CONDITIONS The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi- tions. The VS offset rating is tested with all supplies biased at 15 V differential. High Side Floating Supply Absolute Voltage VB VS+10 VS+20 V High Side Floating Supply Offset Voltage VS Note 1 600 High Side Floating Output Voltage VHO VS VB Logic Supply Voltage VCC 10 20 Logic Input Voltage VIN 0 VCC Ambient Temperature TA –40 125 °C Note 1: Logic operational for VS of –5 to +600 V. Logic state held for VS of –5 V to –VBS. |
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