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AZ4052M-G1 Datasheet(PDF) 1 Page - BCD Semiconductor Manufacturing Limited |
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AZ4052M-G1 Datasheet(HTML) 1 Page - BCD Semiconductor Manufacturing Limited |
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1 / 18 page  Preliminary Datasheet Dual 4-channel Analog Multiplexer/Demultiplexer AZ4052 Oct. 2011 Rev. 1.1 BCD Semiconductor Manufacturing Limited 1 General Description The AZ4052 is high-speed si-gate CMOS device. The AZ4052 is dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E ___ ). When pin E ___ =LOW, one of the four switches is selected (Low-impedance On-state) with pins S0 and S1. When pin E ___ =HIGH, all switches are in the high-impedance Off-state, independent of pins S0 and S1. VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1 and E ___ ). The VCC to GND ranges are 3.0V to 10V. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC-VEE may not exceed 10V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (Typically Ground). The AZ4052 is available in standard packages of SOIC-16 and DIP-16. Features • Wide Operation Voltage: ±5.0V or 10V • Low On-resistance: - 55Ω (Typ.) at VCC-VEE=5V - 40Ω ( Typ.) at VCC-VEE=10V • Ultra Low THD+N: 0.003% @ 10V, 0.008% @ 5.0V • Ultra Low Crosstalk: -120dB • Ultra Low Noise: 6.0μVRMS • Operating Temperature: -40ºC to 85ºC Applications • LCD TV/PDP TV/CRT TV • 4:1 Multi-channel Signal Selecting Function Table Control Input On Channel E ___ S1 S0 L L L nY0 nZ L L H nY1 nZ L H L nY2 nZ L H H nY3 nZ H X X None Figure 1. Package Types of AZ4052 SOIC-16 DIP-16 |
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Similar Description - AZ4052M-G1 |
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