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FAN5230QSC Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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FAN5230QSC Datasheet(HTML) 10 Page - Fairchild Semiconductor |
10 / 16 page FAN5230 10 REV. 2.8.5 10/17/01 This mode of operation implies the use of a push button switch between SDWN and Vin. Pushing the button allows (for the duration of the contact) to power the 3.3V-ALWAYS and 5V-ALWAYS long enough for the uC to power up and in turn latch the SDWN pin high. Once the SDWN is high then the ALWAYS voltages are en- abled to go high if the respective SDN3.3 and SDN5 go high. MAIN 3.3V and 5V Softstart, Sequencing and Stand-by Softstart of the 3.3V and 5V converters is accomplished by means of an external capacitor between pins SDN3.3 (SDN5) and ground. The 3.3V (5V) main converter is turned ON if SDWN and SDN3.3 (SDN5) are both high and is turned off if either SDWN or SDN3.3 (SDN5) is low. Stand-by mode is defined as the condition by which V-Mains are OFF and V-ALWAYS are ON (SDWN=1 and SDN3.3=SDN5=0). ALWAYS mode of Operation If it is desired that 5V-ALWAYS and 3.3V-ALWAYS are always ON then the SDWN pin must be connected to Vin permanently. This way the two ALWAYS regulators come up as soon as there is power while the state of the Main regulators can be controlled via the SDN5 and SDN3.3 pins. Sequencing Table 3.3V and 5V Light Load Mode The 3.3V and 5V converters are synchronous bucks, and can operate in two quadrants, this means that the ripple current is constant and independent of the load current. At light loads, this ripple current translates into poor efficiency, since it causes circulating current losses in the MOSFETs. To opti- mize the efficiency at light loads, then, the FAN5230 switches from normal operation to a special light load mode after an 8 clock pulse delay. This prevents false triggering when the voltage across the on-state low-side MOSFET goes positive. Vice-versa when this voltage becomes negative the FAN5230 switches back to PWM operation. The current threshold for switch to and from light load is therefore: Ith = Iripplepeak In light load mode, the FAN5230 switches from PWM (pulse width modulation) to PFM (pulse frequency modulation), which reduces the gate drive current. As the load current becomes very light, the FAN5230 begins pulse skipping, but remains synchronized with the clock. See next section for low side drive management. Low Side Driver Forcing in Light Load During light load operation, the Low Side Driver (LSD) is traditionally turned permanently OFF to avoid current inver- sion in the inductor and associated efficiency losses. At the same time the low side driver also needs to be turned ON in order to a) measure current (current is sensed on the low side driver) and b) assure proper operation of the charge pump, especially under low current and low input voltage condi- tions. In order to accomplish all the above, when the circuit enters hysteretic operation the LSD is kept “ON” to re-circu- late positive and decaying currents (corresponding to nega- tive drops across low side driver Rdson) and turned off as soon as current crosses zero (corresponding to drop across Rdson becoming positive). This way the low side driver is utilized in “partial duty” or as “active zero drop diode” (compared to classic light load operation in which the LSD is turned permanently OFF) allowing more functionality with- out loss in efficiency. 3.3V Voltage Adjustment The output voltage of the 3.3V converter can be increased by as much as 10% by inserting a resistor divider in the feedback line. The feedback pin impedance is about 66K Ω. Thus, for example, to increase the output of the 3.3V converter by 10%, use a 2.21K Ω/33.2KΩ divider. Note that the output of the 5V regulator cannot be adjusted. The feedback line of the 5V regulator is used internally as a 5V supply and, therefore, cannot tolerate any impedance in series with it. 3.3V and 5V Main Overvoltage Protection (Soft Crowbar) When the output voltage of the 3.3V (or the 5V) converter exceeds approximately 115% of nominal, the converter enters the over-voltage (OV) protection mode, with the goal of pro- tecting the load from damage. During operation, severe load dump or a short of an upper MOSFET could cause the output voltage to increase significantly over normal operation range without circuit protection. When the output exceeds the over- voltage threshold, the over-voltage comparator forces the lower gate driver high and turns the lower MOSFET on. This will pull down the output voltage and eventually may blow the battery fuse. As soon as output voltage drops below the threshold, OVP comparator is disengaged. The OVP scheme also provides a soft crowbar function (bang-bang control followed by blow of the fuse) which helps to tackle severe load transients but does not invert out- put voltage when activated—a common problem for OVP schemes with a latch. The prevention of output inversion eliminates the need for a Schottky diode across the load. SDN5 SDN3.3 SDWN 3V&5V ALWAYS 5V MAIN 3.3V MAIN X X 0 0 0 0 00 1 1 0 0 101 1 1 0 01 1 1 0 1 1 1 1 1 1 1 |
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