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AD9683BCPZRL7-170 Datasheet(PDF) 11 Page - Analog Devices |
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AD9683BCPZRL7-170 Datasheet(HTML) 11 Page - Analog Devices |
11 / 44 page Data Sheet AD9683 Rev. 0 | Page 11 of 44 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE PROVIDES THE GROUND REFERENCE FOR AVDD. THIS EXPOSED PAD MUST BE CONNECTED TO AGND FOR PROPER OPERATION. RST 24 DNC 23 PDWN 22 CS 21 SCLK 20 SDIO 19 FD 18 DGND 17 DVDD 1 2 3 4 5 6 7 8 RFCLK CLK– CLK+ AVDD SYSREF+ SYSREF– AVDD AD9683 TOP VIEW (Not to Scale) Figure 4. Pin Configuration (Top View) Table 8. Pin Function Descriptions Pin No. Mnemonic Type Description ADC Power Supplies 4, 7, 26, 27, 30, 31, 32 AVDD Supply Analog Power Supply (1.8 V Nominal). 10, 17 DVDD Supply Digital Power Supply (1.8 V Nominal). 9, 18 DGND Ground Ground Reference for DVDD. 13 DRGND Ground Ground Reference for DRVDD. 14 DRVDD Supply JESD204B PHY Serial Output Driver Supply (1.8 V Nominal). Note that the DRVDD power is referenced to the AGND plane. 24 DNC Do Not Connect. EPAD (AGND) Ground Exposed Pad. The exposed thermal pad on the bottom of the package provides the ground reference for AVDD. This exposed pad must be connected to AGND for proper operation. ADC Analog 1 RFCLK Input ADC RF Clock Input. 2 CLK− Input ADC Nyquist Clock Input—Complement. 3 CLK+ Input ADC Nyquist Clock Input—True. 25 VCM Output Common-Mode Level Bias Output for Analog Inputs. Decouple this pin to ground using a 0.1 µF capacitor. 28 VIN− Input Differential Analog Input (−). 29 VIN+ Input Differential Analog Input (+). ADC Fast Detect Output 19 FD Output Fast Detect Indicator (CMOS Levels). Digital Inputs 5 SYSREF+ Input JESD204B LVDS SYSREF Input—True. 6 SYSREF− Input JESD204B LVDS SYSREF Input—Complement. 11 SYNCINB+ Input JESD204B LVDS Sync Input—True. 12 SYNCINB− Input JESD204B LVDS Sync Input—Complement. Data Outputs 15 SERDOUT0− Output CML Output Data—Complement. 16 SERDOUT0+ Output CML Output Data—True. |
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