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FDP7030 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FDP7030 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 4 page April 1998 FDP7030L / FDB7030L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features _________________________________________________________________________________ Absolute Maximum Ratings T C = 25°C unless otherwise noted Symbol Parameter FDP7030L FDB7030L Units V DSS Drain-Source Voltage 30 V V GSS Gate-Source Voltage - Continuous ±20 V I D Drain Current - Continuous (Note 1) 100 A 75 - Pulsed (Note 1) 300 P D Total Power Dissipation @ T C = 25°C 125 W Derate above 25°C 0.83 W/°C T J,TSTG Operating and Storage Temperature Range -65 to 175 °C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 275 °C THERMAL CHARACTERISTICS RθJC Thermal Resistance, Junction-to-Case 1.2 °C/W RθJA Thermal Resistance, Junction-to-Ambient 62.5 °C/W FDP7030L Rev.D 1 100 A, 30 V. R DS(ON) = 0.007 Ω @ V GS=10 V R DS(ON) = 0.010 Ω @ V GS=5 V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. High density cell design for extremely low R DS(ON). 175°C maximum junction temperature rating. These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. S D G © 1998 Fairchild Semiconductor Corporation |
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