TPS7A37

SBVS220 – MARCH 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCT

(2)

TPS7A37xx yyy z

YYY is package designator.

Z is package quantity.

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the

device product folder at www.ti.com.

(2)

Most output voltages of 1.25 V and 1.3 V to 5.0 V in 100-mV increments are available on a quick-turn basis using innovative factory

package-level programming. Minimum order quantities apply; contact factory for details and availability.

(3)

For fixed 1.20-V operation, tie FB to OUT.

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating temperature range (unless otherwise noted).

VALUE

MIN

MAX

UNIT

IN

–0.3

+6.0

V

EN

–0.3

+6.0

V

Voltage

OUT

–0.3

+5.5

V

NR, FB

–0.3

+6.0

V

Peak output current

Internally limited

A

Current

Output short-circuit duration

Indefinite

A

–55

+150

°C

Temperature

–65

+150

°C

Human body model (HBM)

2

kV

Electrostatic discharge (ESD) ratings

Charged device model (CDM)

500

V

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics

is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TPS7A37xx

DRV

UNITS

6 PINS

Junction-to-ambient thermal resistance

67.2

Junction-to-case (top) thermal resistance

87.6

Junction-to-board thermal resistance

36.8

°C/W

Junction-to-top characterization parameter

1.8

Junction-to-board characterization parameter

37.2

Junction-to-case (bottom) thermal resistance

7.7

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953A.

2

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