CY8C21345, CY8C21645

CY8C22345, CY8C22345H, CY8C22645

Document Number: 001-55397 Rev. *K

Page 10 of 47

Registers

This section lists the registers of this PSoC device family by mapping tables. For detailed register information, refer to the PSoC

Technical Reference Manual for CY8C21x45 and CY8C22x45 devices.

Register Conventions

The register conventions specific to this section are listed in the

following table.

Register Mapping Tables

The PSoC device has a total register address space of 512

bytes. The register space is referred to as I/O space and is

divided into two banks. The XIO bit in the Flag register (CPU_F)

determines which bank the user is currently in. When the XIO bit

is set the user is in Bank 1.

Note In the following register mapping tables, blank fields are

Reserved and must not be accessed.

43

I/O

I, MR

P2[6]

Direct input to analog block

44

I/O

I, MR

P0[0]

Analog column mux input

45

I/O

I, MR

P0[2]

Analog column mux input

46

I/O

I, MR

P0[4]

Analog column mux input

47

I/O

I, MR

P0[6]

Analog column mux input

48

Power

Supply voltage

LEGEND: A = Analog, I = Input, O = Output, MR= Right analog mux bus input, ML= Left analog mux bus input

Table 3. 48-pin Part Pinout (SSOP) (continued)

Pin

No.

Type

Pin Name

Description

Digital Analog

Table 4. Abbreviations

Convention

Description

RW

Read and write register or bit(s)

R

Read register or bit(s)

W

Write register or bit(s)

L

Logical register or bit(s)

C

Clearable register or bit(s)

#

Access is bit specific