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PIC18F8680 Datasheet(PDF) 10 Page - Microchip Technology |
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PIC18F8680 Datasheet(HTML) 10 Page - Microchip Technology |
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10 / 496 page  PIC18F6585/8585/6680/8680 DS30491D-page 10 2003-2013 Microchip Technology Inc. FIGURE 1-1: PIC18F6X8X BLOCK DIAGRAM Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Instruction Decode & Control OSC1/CLKI OSC2/CLKO/RA6 RG5/ VDD, VSS PORTA PORTB PORTC RA4/T0CKI RA5/AN4/LVDIN RB2/INT2:RB0/INT0 RB6/KBI2/PGC RC0/T1OSO/T13CKI RC1/T1OSI/CCP2 (1) RC2/CCP1/P1A RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RC7/RX/DT Brown-out Reset AUSART Comparator Synchronous BOR Timer1 Timer2 Serial Port RA3/AN3/VREF+ RA2/AN2/VREF- RA1/AN1 RA0/AN0 ECAN Module Timing Generation 10-bit ADC RB3/INT3 Data Latch Data RAM (3328 bytes) Address Latch Address<12> 12 Bank0, F BSR FSR0 FSR1 FSR2 inc/dec logic Decode 4 12 4 PCH PCL PCLATH 8 31 Level Stack Program Counter PRODL PRODH 8 x 8 Multiply W 8 BITOP 8 8 ALU<8> 8 Test Mode Select Address Latch Program Memory (48 Kbytes) Data Latch 21 21 16 8 8 8 Table Pointer<21> inc/dec logic 21 8 Data Bus<8> Table Latch 8 IR 12 3 ROM Latch Timer3 PORTD RD7/PSP7 CCP2 RB4/KBI0 RB5/KBI1/PGM PCLATU PCU Precision Reference Band Gap PORTE PORTG RG0/CANTX1 RG1/CANTX2 RG2/CANRX RG3 RG4/P1D Timer0 RE6/P1B RE7/CCP2(1) RE5/P1C RE4 RE3 RE2/CS RE0/RD RE1/WR LVD ECCP1 RB7/KBI3/PGD :RD0/PSP0 RF6/AN11/C1IN- RF7/SS RF5/AN10/C1IN+/CVREF RF4/AN9/C2IN- RF3/AN8/C2IN+ RF2/AN7/C1OUT RF0/AN5 RF1/AN6/C2OUT PORTF RG5/MCLR/VPP MCLR OSC2/CLKO/RA6 Data EEPROM Note 1: The CCP2 pin placement depends on the CCP2MX and Processor mode settings. 18F8680.book Page 10 Tuesday, January 29, 2013 1:32 PM |
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