UCC28050, UCC28051

UCC38050, UCC38051

SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009

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ZCD (Pin 5): This pin is the input for the zero current detect comparator. The boost inductor current is indirectly

sensed through the bias winding on the boost inductor. The ZCD pin input goes low when the inductor current

reaches zero and that transition is detected. Internal active voltage clamps are provided to prevent this pin from

going below ground or too high. If zero current is not detected within 400

μs, a reset timer sets the latch and

gate drive.

GND (Pin 6): The chip reference ground. All bypassing elements are connected to ground pin with shortest loops

feasible.

DRV (Pin 7): The gate drive output for an external boost switch. This output is capable of delivering up to 750-mA

peak currents during turn-on and turn-off. An external gate drive resistor may be needed to limit the peak current

VCC (Pin 8): The supply voltage for the chip. This pin should be bypassed with a high-frequency capacitor

(greater than 0.1-

μF) and tied to GND. The UCC38050 has a wide UVLO hysteresis of approximately 6.3 V that

allows use of lower value supply capacitor on this pin for quicker and easier start-up. The UCC38051 has a

narrow UVLO hysteresis with of about 2.8 V and a start-up voltage of about 12.5 V for applications where the

operation of the PFC device needs to be controlled by a downstream PWM controller.