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UCC2895 Datasheet(PDF) 3 Page - Texas Instruments |
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UCC2895 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 28 page  UCC1895, UCC2895, UCC3895 www.ti.com SLUS157P – DECEMBER 1999 – REVISED JUNE 2013 RECOMMENDED OPERATING CONDITIONS (1) MIN NOM MAX UNIT VDD Supply voltage 10 16.5 V VDD Supply voltage bypass capacitor(2) 10 × CREF CREF Reference bypass capacitor (UCC1895)(3) 0.1 1.0 µF CREF Reference bypass capacitor (UCC2895, UCC3895)(3) 0.1 4.7 CT Timing capacitor (for 500-kHz switching frequency) 220 pF RT Timing resistor (for 500-kHz switching frequency) 82 k Ω RDEL_AB, RDEL_CD Delay resistor 2.5 40 TJ Operating junction temperature(4) –55 125 °C (1) TI recommends that there be a single point grounded between GND and PGND directly under the device. There must be a separate ground plane associated with the GND pin and all components associated with pins 1 through 12, plus 19 and 20, be located over this ground plane. Any connections associated with these pins to ground must be connected to this ground plane. (2) The VDD capacitor must be a low ESR, ESL ceramic capacitor located directly across the VDD and PGND pins. A larger bulk capacitor must be located as physically close as possible to the VDD pins. (3) The VREF capacitor must be a low ESR, ESL ceramic capacitor located directly across the REF and GND pins. If a larger capacitor is desired for the VREF then it must be located near the VREF cap and connected to the VREF pin with a resistor of 51 Ω or greater. The bulk capacitor on VDD must be a factor of 10 greater than the total VREF capacitance. (4) TI does not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. ELECTRICAL CHARACTERISTICS VDD = 12 V, RT = 82 kΩ, CT = 220 pF, RDELAB = 10 kΩ, RDELCD = 10 kΩ, CREF = 0.1 μF, CVDD = 0.1 μF and no load on the outputs, TA = TJ. TA = 0°C to 70°C for UCC3895x, TA = –40°C to +85°C for UCC2895x and TA = –55°C to +125°C for the UCC1895x. (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT UVLO (UNDERVOLTAGE LOCKOUT) UVLO(on) Start-up voltage threshold 10.2 11 11.8 UVLO(off) Minimum operating voltage after 8.2 9 9.8 V start-up UVLO(hys) Hysteresis 1 2 3 SUPPLY ISTART Start-up current VDD = 8 V 150 250 µA IDD Operating current 5 6 mA VDD_CLAMP VDD clamp voltage IDD = 10 mA 16.5 17.5 18.5 V VOLTAGE REFERENCE VREF Output voltage TJ = 25°C 4.94 5 5.06 10 V < VDD < VDD_CLAMP 4.85 5 5.15 V 0 mA < IREF < 5 mA temperature ISC Short circuit current REF = 0 V, TJ = 25°C 10 20 mA ERROR AMPLIFIER Common-mode input voltage range –0.1 3.6 V VIO Offset voltage –7 7 mV IBIAS Input bias current (EAP, EAN) –1 1 µA EAOUT_VOH High-level output voltage EAP-EAN = 500 mV, IEAOUT = –0.5 mA 4 4.5 5 V EAOUT_VOL Low-level output voltage EAP-EAN = –500 mV, IEAOUT = 0.5 mA 0 0.2 0.4 ISOURCE Error amplifier output source current EAP-EAN = 500 mV, EAOUT = 2.5 V 1 1.5 mA ISINK Error amplifier output sink current EAP-EAN = –500 mV, EAOUT = 2.5 V 2.5 4.5 AVOL Open-loop dc gain 75 85 dB GBW Unity gain bandwidth(1) 5 7 mHz Slew rate(1) 1 V < EAN <0 V, EAP = 500 mV 1.5 2.2 V/µs 0.5 V < EAOUT < 3 V (1) Ensured by design. Not production tested. Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: UCC1895 UCC2895 UCC3895 |
Similar Part No. - UCC2895 |
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Similar Description - UCC2895 |
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