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ADUM1100ARZ Datasheet(PDF) 9 Page - Analog Devices

Part # ADUM1100ARZ
Description  iCoupler Digital Isolator
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADUM1100ARZ Datasheet(HTML) 9 Page - Analog Devices

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Data Sheet
ADuM1100
Rev. I | Page 9 of 20
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
Pulse Width Distortion, |tPLH − tPHL|5
PWD
5 V/3 V Operation
0.5
2
ns
CL = 15 pF, CMOS signal levels
3 V/5 V Operation
0.5
3
ns
CL = 15 pF, CMOS signal levels
Change in Pulse Width Distortion vs.
Temperature6
5 V/3 V Operation
3
ps/°C
CL = 15 pF, CMOS signal levels
3 V/5 V Operation
10
ps/°C
CL = 15 pF, CMOS signal levels
Propagation Delay Skew (Equal
Temperature)5, 7
tPSK1
5 V/3 V Operation
12
ns
CL = 15 pF, CMOS signal levels
3 V/5 V Operation
15
ns
CL = 15 pF, CMOS signal levels
Propagation Delay Skew (Equal
Temperature, Supplies)5, 7
tPSK2
5 V/3 V Operation
9
ns
CL = 15 pF, CMOS signal levels
3 V/5 V Operation
12
ns
CL = 15 pF, CMOS signal levels
Output Rise/Fall Time (10% to 90%)
tR, tF
3
ns
CL = 15 pF, CMOS signal levels
Common-Mode Transient Immunity at
Logic Low/High Output8
|CML|,
|CMH|
25
35
kV/μs
VI = 0 V or VDD1, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
fr
5 V/3 V Operation
1.2
Mbps
3 V/5 V Operation
1.1
Mbps
Input Dynamic Supply Current9
CPD1
5 V/3 V Operation
0.09
mA/Mbps
3 V/5 V Operation
0.08
mA/Mbps
Output Dynamic Supply Current9
CPD2
5 V/3 V Operation
0.04
mA/Mbps
3 V/5 V Operation
0.02
mA/Mbps
1 Output supply current values are with no output load present. See
and
for information on supply current variation with logic signal frequency. See
the
section for guidance on calculating the input and output supply currents for a given data rate and output load.
Figure 5
Figure 5
Figure 6
Figure 6
Power Consumption
Power Consumption
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4 tPHL is measured from the 50% level of the falling edge of the VI signal to the 50% level of the falling edge of the VO signal. tPLH is measured from the 50% level of the
rising edge of the VI signal to the 50% level of the rising edge of the VO signal.
5 Because the input thresholds of the ADuM1100 are at voltages other than the 50% level of typical input signals, the measured propagation delay and pulse width
distortion can be affected by slow input rise/fall times. See the
section and
through
for information on the
impact of given input rise/fall times on these parameters.
Propagation Delay-Related Parameters
Figure 14
Figure 18
6 Pulse width distortion change vs. temperature is the absolute value of the change in pulse width distortion for a 1°C change in operating temperature.
7 tPSK1 is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature and output load within the
recommended operating conditions. tPSK2 is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating
temperature, supply voltages, and output load within the recommended operating conditions.
8 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling edges. The transient magnitude is the range
over which the common mode is slewed.
9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See
and
for information on
supply current variation with logic signal frequency. See the
section for guidance on calculating the input and output supply currents for a given
data rate and output load.


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