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MSP430F2234IYFFR Datasheet(PDF) 10 Page - Texas Instruments |
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MSP430F2234IYFFR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 95 page MSP430F22x2 MSP430F22x4 SLAS504G – JULY 2006 – REVISED AUGUST 2012 www.ti.com Table 3. Terminal Functions, MSP430F22x2 (continued) TERMINAL NO. I/O DESCRIPTION NAME YFF DA RHA General-purpose digital I/O pin P4.7/TBCLK F5 24 22 I/O Timer_B, clock signal TBCLK input Reset or nonmaskable interrupt input RST/NMI/SBWTDIO B3 7 5 I Spy-Bi-Wire test data input/output during programming and test Selects test mode for JTAG pins on Port 1. The device protection fuse is connected to TEST. TEST/SBWTCK D1 1 37 I Spy-Bi-Wire test clock input during programming and test C1, D3, DVCC 2 38, 39 Digital supply voltage D4, E4, E5 C6, AVCC C7, 16 14 Analog supply voltage D5 A3, B1, DVSS B2, 4 1, 4 Digital ground reference C3, C4 B7, AVSS 15 13 Analog ground reference C5 QFN Pad NA NA Pad NA QFN package pad; connection to DVSS recommended. 10 Copyright © 2006–2012, Texas Instruments Incorporated |
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