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APPLICATION INFORMATION

V

CC

Special

Buffered

Bus

Special

Buffered

Bus

Standard

I C Bus

2

Standard

I C Bus

2

SDA

SCL

I C

Device

2

SDA

SCL

P82B715

P82B715

LDA

LCL

Long

Cable

½

½

½

½

I

Pullup Resistance Calculation

P82B715

SCPS145A – DECEMBER 2007 – REVISED FEBRUARY 2008

By using two (or more) P82B715 devices, a subsystem can be built that retains the interface characteristics of a

The subsystem features a low-impedance or buffered bus capable of driving large wiring capacitance (see

Figure 3).

Figure 3. Minimum Subsystem Diagram

The P82B715 can operate with a supply voltage from 3 V to 12.5 V, but the logic-signal levels at Sx/Lx are

independent of the supply voltage. They remain at the levels presented to the chip by the attached devices. The

causes a difference less than 100 mV in the bus logic low levels at Sx and Lx. This makes P82B715 fully

compatible with all logic signal drivers, including TTL. The P82B715 cannot modify the bus logic signal voltage

swing if the applied logic levels would have exceeded the supply voltage by more than 0.7 V.

In normal applications, external pullup resistors pull the connected buses up to the desired voltage high level.

3.3 V and preferably higher. Note that full performance over temperature is ensured only from 4.5 V.

the standard open-collector configuration is retained. The size and number of pullup resistors depends on the

system.

If P82B715 devices are to be permanently connected into a system, the circuit may be configured with only one

performance is improved by fitting separate pullups on each section of the bus. When a subsystem using

When calculating the pullup resistance values, the gain of the buffer introduces scaling factors that must be

applied to the system components. In practical systems, the pullup resistance value is calculated to meet the rise

the total system (product of the net resistance and net capacitance) is set to 1

µs or less.

In systems using the P82B715, it is convenient to set the total system time constant by considering each bus

node to provide time constants of less than 1

µs. If each node complies then the system requirement is also met.

Copyright © 2007–2008, Texas Instruments Incorporated

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Product Folder Link(s): P82B715