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SE370C758AJNT Datasheet(PDF) 9 Page - Texas Instruments |
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SE370C758AJNT Datasheet(HTML) 9 Page - Texas Instruments |
9 / 75 page TMS370Cx5x 8-BIT MICROCONTROLLER SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997 9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 CPU The CPU used on TMS370Cx5x devices is the high-performance 8-bit TMS370 CPU module. The ’x5x implements an efficient register-to-register architecture that eliminates the conventional accumulator bottleneck. The complete ’x5x instruction set is summarized in Table 23. Figure 1 illustrates the CPU registers and memory blocks. 0000h 0200h 0400h 1000h 10C0h 1100h 1F00h Interrupts and Reset Vectors; Trap Vectors 0600h FFFFh 0 RAM (Includes 256-Byte Registers File) 0 15 Program Counter 7 Legend: Z=Zero IE1=Level1 interrupts Enable C=Carry V=Overflow N=Negative IE2=Level2 interrupts Enable IE1 IE2 Z N C 0 1 2 3 4 5 6 7 V Status Register (ST) Stack Pointer (SP) R0(A) R1(B) R3 R127 0000h 0001h 0002h 007Fh R255 0003h R2 00FFh Reserved† 16K-Byte ROM / EPROM (4000h – 7FFFh) 1E00h 0100h 0E00h 12K-Byte ROM (5000h – 7FFFh) 8K-Byte ROM (6000h – 7FFFh) 32K-Byte ROM / EPROM (2000h – 9FFFh) 48K-Byte ROM / EPROM (2000h – DFFFh) Memory Expansion 2000h 4000h 5000h 6000h 7000h 7FC0h 8000h A000h E000h 256-Byte RAM (0000h – 00FFh) 512-Byte RAM (0000h – 01FFh) 1K-Byte RAM (0000h – 03FFh) 1.5K-Byte RAM (0000h – 05FFh) 3.5K-Byte RAM (0000h – 0DFFh) Peripheral File Peripheral Exp Reserved† 512-Byte (1E00h – 1FFFh) Data EEPROM 256-Byte (1F00h – 1FFFh) 4K-Byte ROM (7000h – 7FFFh) † Reserved means the address space is reserved for future expansion. Figure 1. Programmer’s Model |
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