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TMS320F28033PNT Datasheet(PDF) 1 Page - Texas Instruments |
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TMS320F28033PNT Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 157 page  TMS320F28030, TMS320F28031, TMS320F28032 TMS320F28033, TMS320F28034, TMS320F28035 www.ti.com SPRS584I – APRIL 2009 – REVISED JULY 2012 Piccolo Microcontrollers Check for Samples: TMS320F28030, TMS320F28031, TMS320F28032, TMS320F28033, TMS320F28034, TMS320F28035 1 TMS320F2803x ( Piccolo™) MCUs 1.1 Features 123 • Highlights • Low Device and System Cost: – High-Efficiency 32-Bit CPU ( TMS320C28x™) – Single 3.3-V Supply – 60-MHz Device – No Power Sequencing Requirement – Single 3.3-V Supply – Integrated Power-on Reset and Brown-out Reset – Integrated Power-on and Brown-out Resets – Low Power – Two Internal Zero-pin Oscillators – No Analog Support Pins – Up to 45 Multiplexed GPIO Pins • Clocking: – Three 32-Bit CPU Timers – Two Internal Zero-pin Oscillators – On-Chip Flash, SARAM, OTP Memory – On-Chip Crystal Oscillator/External Clock – Code-Security Module Input – Serial Port Peripherals – Dynamic PLL Ratio Changes Supported (SCI/SPI/I2C/LIN/eCAN) – Watchdog Timer Module – Enhanced Control Peripherals – Missing Clock Detection Circuitry • Enhanced Pulse Width Modulator (ePWM) • Up to 45 Individually Programmable, • High-Resolution PWM (HRPWM) Multiplexed GPIO Pins With Input Filtering • Enhanced Capture (eCAP) • Peripheral Interrupt Expansion (PIE) Block That • High-Resolution Input Capture (HRCAP) Supports All Peripheral Interrupts • Enhanced Quadrature Encoder Pulse • Three 32-Bit CPU Timers (eQEP) • Independent 16-Bit Timer in Each ePWM • Analog-to-Digital Converter (ADC) Module • On-Chip Temperature Sensor • On-Chip Memory • Comparator – Flash, SARAM, OTP, Boot ROM Available – 56-Pin, 64-Pin, and 80-Pin Packages • 128-Bit Security Key/Lock • High-Efficiency 32-Bit CPU ( TMS320C28x™) – Protects Secure Memory Blocks – 60 MHz (16.67-ns Cycle Time) – Prevents Firmware Reverse Engineering – 16 x 16 and 32 x 32 MAC Operations • Serial Port Peripherals – 16 x 16 Dual MAC – One SCI (UART) Module – Harvard Bus Architecture – Two SPI Modules – Atomic Operations – One Inter-Integrated-Circuit (I2C) Bus – Fast Interrupt Response and Processing – One Local Interconnect Network (LIN) Bus – Unified Memory Programming Model – One Enhanced Controller Area Network – Code-Efficient (in C/C++ and Assembly) (eCAN) Bus • Programmable Control Law Accelerator (CLA) • Advanced Emulation Features – 32-Bit Floating-Point Math Accelerator – Analysis and Breakpoint Functions – Executes Code Independently of the Main – Real-Time Debug via Hardware CPU • 2803x Packages • Endianness: Little Endian – 56-Pin RSH Very Small Quad Flatpack (No Lead) (VQFN) – 64-Pin PAG Thin Quad Flatpack (TQFP) – 80-Pin PN Low-Profile Quad Flatpack (LQFP) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 Piccolo, TMS320C28x, C28x, TMS320C2000, Code Composer Studio, XDS510, XDS560 are trademarks of Texas Instruments. 3 All other trademarks are the property of their respective owners. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information Copyright © 2009–2012, Texas Instruments Incorporated current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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