Electronic Components Datasheet Search |
|
TPS79730DCKT Datasheet(PDF) 2 Page - Texas Instruments |
|
|
TPS79730DCKT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 17 page TPS797xx SLVS332H – MARCH 2001 – REVISED APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT VOUT (2) TPS797xx yy yz XX is nominal output voltage (for example, 25 = 2.5V). YYY is package designator. Z is package quantity. (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Output voltages from 1.25V to 4.9V in 50mV increments are available through the use of probe level programming; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS (1) Over operating junction temperature range, unless otherwise noted. Input voltage range(2) –0.3V to 6V Maximum dc output voltage 4.9V Peak output current Internally limited ESD rating, HBM 2kV ESD rating, CDM 500V Continuous total power dissipation See Dissipation Ratings Table Operating virtual junction temperature range, TJ –40°C to +85°C Storage temperature range, TSTG –65°C to +150°C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. PACKAGE DISSIPATION RATINGS RθJC RθJA DERATING FACTOR TA ≤ +25°C TA = +70°C TA = +85°C BOARD PACKAGE °C/W °C/W ABOVE TA = +25°C POWER RATING POWER RATING POWER RATING Low K(1) DCK 165.39 396.24 2.52mW/°C 252mW 139mW 101mW High K(2) DCK 165.39 314.74 3.18mW/°C 318mW 175mW 127mW (1) The JEDEC low K (1s) board design used to derive this data was a 3-inch × 3-inch, two layer board with 2 ounce copper traces on top of the board. (2) The JEDEC high K (2s2p) board design used to derive this data was a 3-inch × 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. 2 Submit Documentation Feedback Copyright © 2001–2012, Texas Instruments Incorporated |
Similar Part No. - TPS79730DCKT |
|
Similar Description - TPS79730DCKT |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |