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74HCT02N Datasheet(PDF) 1 Page - NXP Semiconductors |
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74HCT02N Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 1 page 1. General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input NOR function. 2. Features and benefits Input levels: For 74HC02: CMOS level For 74HCT02: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information 74HC02; 74HCT02 Quad 2-input NOR gate Rev. 4 — 4 September 2012 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC02N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74HCT02N 74HC02D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74HCT02D 74HC02DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74HCT02DB 74HC02PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74HCT02PW 74HC02BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm SOT762-1 74HCT02BQ |
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Similar Description - 74HCT02N |
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