USB3322C-GL-TR datasheet(11/79 Pages) MICROCHIP

Part #	USB3322C-GL-TR

Description	Industry?셲 Smallest Hi-Speed USB Transceiver with 1.8V ULPI Interface

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Manufacturer	MICROCHIP [Microchip Technology]

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Industry’s Smallest Hi-Speed USB Transceiver with 1.8V ULPI Interface

Datasheet

SMSC USB332x

11

Revision 1.1 (11-20-12)

DATASHEET

D2

VDD33

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm

ESR) bypass capacitor to ground is

required for regulator stability. The

bypass capacitor should be placed as

close as possible to the USB332x.

D1

DM

I/O,

Analog

N/A

D- pin of the USB cable.

E1

DP

I/O,

Analog

N/A

D+ pin of the USB cable.

E2

SPK_R

I/O,

Analog

N/A

USB switch in/out for DP signals

E3

SPK_L

I/O,

Analog

N/A

USB switch in/out for DM signals

D3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is

the MSB.

E4

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

E5

DATA[5]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

D4

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

A5

CLKOUT

Output,

CMOS

N/A

ULPI Clock Out Mode:

60MHz ULPI clock output. All ULPI

signals are driven synchronous to the

rising edge of this clock.

ULPI Clock In Mode:

This pin is connected to VDD18 to

configure 60MHz ULPI Clock IN mode as

described in Section 5.4.1.

D5

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C4

DATA[2]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C5

DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

B4

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is

the LSB.

B5

NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data.

When the Link is sending data to the

PHY, NXT indicates when the current

byte has been accepted by the PHY. The

Link places the next byte on the data bus

in the following clock cycle.

Table 2.1 USB332x Pin Description (continued)

BALL

NAME

DIRECTION/

TYPE

ACTIVE

LEVEL

DESCRIPTION

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USB3322C-GL-TR Datasheet(PDF) 11 Page - Microchip Technology

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