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UCD7100 Datasheet(PDF) 11 Page - Texas Instruments |
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UCD7100 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 26 page 14 UCD91xx with CLA Peripheral 1 12 8 PVDD OUT CS 10 PGND 3 4 2 5 6 3V3 AGND IN CLF ILIM 7 2 UCD7100PWP Bias Winding VIN VOUT VDS CS FB CS VDS COMMUNICATION (Programming & Status Reporting) Bias Supply 11 OUT 9 PGND 13 PVDD VDD NC 2 Isolation Amplifier 2 1 UCD7100 www.ti.com SLUS651C – MARCH 2005 – REVISED MAY 2010 Thermal Information The useful range of a driver is greatly affected by the drive power requirements of the load and the thermal characteristics of the device package. In order for a power driver to be useful over a particular temperature range the package must allow for the efficient removal of the heat produced while keeping the junction temperature within rated limits. The UCD7K family of drivers is available in PowerPAD™ TSSOP package to cover a range of application requirements. Both have the exposed pads to relieve thermal dissipation from the semiconductor junction. As illustrated in Reference [2], the PowerPAD™ packages offer a leadframe die pad that is exposed at the base of the package. This pad is soldered to the copper on the PC board (PCB) directly underneath the device package, reducing the ΘJC down to 4.7°C/W. The PC board must be designed with thermal lands and thermal vias to complete the heat removal subsystem, as summarized in Reference [3]. Note that the PowerPAD™ is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device. Circuit Layout Recommendations In a power driver operating at high frequency, it is a significant challenge to get clean waveforms without much overshoot/undershoot and ringing. The low output impedance of these drivers produces waveforms with high di/dt. This tends to induce ringing in the parasitic inductances. Utmost care must be used in the circuit layout. It is advantageous to connect the driver IC as close as possible to the leads. The driver device layout has the analog ground on the opposite side of the output, so the ground should be connected to the bypass capacitors and the load with copper trace as wide as possible. These connections should also be made with a small enclosed loop area to minimize the inductance. Figure 2. Isolated Forward Converter Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): UCD7100 |
Similar Part No. - UCD7100_12 |
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Similar Description - UCD7100_12 |
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