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SG6841SZ3 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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SG6841SZ3 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 14 page Product Specification High-integrated Green-mode PWM Controller SG6841 ©System General Corp. - 2 - www.sg.com.tw Version 2.1 (IRO33.0001.B5) Jun.15,2006 MARKING DIAGRAMS PIN CONFIGURATION ORDERING INFORMATION Part Number Package SG6841S 8-Pin SOP SG6841D 8-Pin DIP SG6841SZ 8-Pin SOP(Lead Free) SG6841DZ 8-Pin DIP(Lead Free) PIN DESCRIPTIONS Pin No. Symbol Function Description 1 GND Ground Ground. 2 FB Feedback The signal from external compensation circuit is feed into this pin. The PWM duty cycle is determined by this FB pin and current sense signal from Pin 6. 3 VIN Start-Up Input This pin is pulled high to the rectified line input through a resistor for start-up. Since the start-up current requirement for SG6841 is very small, a large start-up resistance can be used to minimize power loss. Under normal operation, this pin is also used to detect line voltage to compensate for constant output power limit for universal AC input. 4 Ri Reference Setting A resistor from RI pin to ground will generate a constant current source forSG6841. This current is used to charge an internal capacitor and hence the switching frequency are determined. Increasing the resistance will decrease the current source and reduce the switching frequency. A 26kΩ resistor Ri creates a 50uA constant current Ii and generates 65kHz switching frequency. 5 RT Temperature Protection For over-temperature protection. An external NTC thermistor is connected from this pin to ground. The impedance of the NTC will decrease under high temperature. Once the voltage on RT pin drops below a fixed limit, the PWM output will be disabled. 6 SENSE Current Sense Current sense. The sensed voltage is used for current mode control and pulse-by-pulse current limiting. 7 VDD Power supply Power Supply. 8 GATE Driver Output The totem-pole output driver for the power MOSFET. A soft driving waveform is implemented to improve EMI. T: D = DIP, S = SOP P: Z = Lead Free Null=regular package XXXXXXX: Wafer Lot YY: Year; WW: Week V: Assembly Location SG6841TP XXXXXXXYYWWV RI VIN GATE VDD SENSE RT GND FB |
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