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CY14E101J2-SXI Datasheet(PDF) 11 Page - Cypress Semiconductor |
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CY14E101J2-SXI Datasheet(HTML) 11 Page - Cypress Semiconductor |
11 / 31 page CY14C101J CY14B101J CY14E101J Document Number: 001-54050 Rev. *M Page 11 of 31 Figure 11. Single-Byte Write into nvSRAM (except Hs-mode) S1 0 1 0 A2 A1 A16 0 A A A A S T A R T S T 0 P P Most Signifiant Address Byte Least Significant Address Byte Data Byte Memory Slave Address SDA Line By Master By nvSRAM Figure 12. Multi-Byte Write into nvSRAM (except Hs-mode) S1 0 1 0 A2 A1 A16 0 A A A A S T A R T Most Significant Address Byte Memory Slave Address SDA Line By Master A S T 0 P P Data Byte N By nvSRAM Data Byte 1 Least Significant Address Byte Figure 13. Single-Byte Write into nvSRAM (Hs-mode) S1 0 1 0 A2 A1 A16 0 A A A A S T A R T Most Significant Address Byte Memory Slave Address SDA Line By Master A S T 0 P P Data Byte N By nvSRAM Data Byte 1 Least Significant Address Byte Figure 14. Multi-Byte Write into nvSRAM (Hs-mode) S0 0 0 0 1X X X A A A A S T A R T Memory Slave Address Most Significant Address Byte Least Significant Address Byte Hs-mode command SDA Line By Master A Data Byte 1 Sr 10 1 0 A2 A1 A16 0 A Data Byte 2 A Data Byte 3 A S T 0 P P Data Byte N By nvSRAM SDA Line By Master By nvSRAM |
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