Document Number: 001-45076 Rev. *F

Page 11 of 16

Truth Table

CE [27]

WE

OE

BHE

BLE

Inputs/Outputs

Mode

Power

H

X

X

X

X

High Z

Deselect or power down

L

X

X

H

H

High Z

Output disabled

L

H

L

L

L

Read

LHLHL

Read

L

H

L

L

H

Read

L

H

H

L

L

High Z

Output disabled

L

H

H

H

L

High Z

Output disabled

L

H

H

L

H

High Z

Output disabled

L

L

X

L

L

Write

L

L

X

H

L

Write

L

L

X

L

H

Write

Note

27. Chip enable must be at CMOS levels (not floating). Intermediate voltage levels on this pin is not permitted.