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LM4308GR_NOPB Datasheet(PDF) 6 Page - Texas Instruments |
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LM4308GR_NOPB Datasheet(HTML) 6 Page - Texas Instruments |
6 / 33 page LM4308 SNLS225C – AUGUST 2007 – REVISED MAY 2013 www.ti.com SWITCHING CHARACTERISTICS (continued) Over recommended operating supply and temperature ranges unless otherwise specified. (1) Symbol Parameter Conditions Min Typ Max Units POWER UP TIMING ta DC ON High Delay Link Start Up Sequence CLK 128 cycles tb DC Low Delay CLK 128 cycles tc DC Active Delay CLK 504 cycles td DD High Delay CLK 128 cycles te DD Low Delay CLK 8 cycles tf DD Differential ON CLK 128 cycles tSU Start Up Delay ta +tb + tc + td + te + tf CLK 1,024 Includes PLL Lock Time cycles POWER OFF TIMING tO Turn Off Delay See (5) 0.1 2 µs (5) Specified functionally by the IDDZ parameter. See also Figure 7. RECOMMENDED INPUT TIMING REQUIREMENTS Over recommended operating supply and temperature ranges unless otherwise specified. (1) Symbol Parameter Conditions Min Typ Max Units MASTER REFERENCE CLOCK (CLK) f Clock Frequency 9.6 30 MHz tCP Clock Period 33.3 104.2 ns CLKDC Clock Duty Cycle 30 50 70 % tT Clock/Data Transition Times (Rise or Fall, 10%–90%)(2) 2 >2 ns tCLKgap CLK Stop Gap 4 CLKcycles (1) Typical values are given for VDDIO = 1.8V and VDD = VDDA = 1.8V and TA = 25°C. (2) Maximum transition time is a function of clock rate and should be less than 30% of the clock period to preserve signal quality. 6 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LM4308 |
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